Specification	ADSP-21369KSWZ-4A

Clock Rate (Frequency)	350 MHz
Interface	DPI, DAI
Mounting Type	Surface Mount
Non-Volatile Memory Size	768 kB
Non-Volatile Memory Type	ROM
On-Chip RAM	256 kB
Operating Temperature (Max)	70 °C
Operating Temperature (Min)	0 °C
Package / Case	208-LQFP Exposed Pad
Package Length	28 mm
Package Name	208-LQFP-EP
Package Width	28 mm
Type	Floating Point
Voltage - Core	1.2 V
Voltage - I/O	3.3 V

ADSP-21369 Series

High-Performance 32-bit Floating-Point SHARC Processor for General Purpose Applications

Part	On-Chip RAM	Interface	Non-Volatile Memory Type	Non-Volatile Memory Size	Operating Temperature (Min)	Operating Temperature (Max)	Package / Case	Voltage - Core	Type	Clock Rate (Frequency)	Mounting Type	Voltage - I/O	Package Name	Package Length	Package Width
Analog Devices Inc./Maxim Integrated ADSP-21369KSWZ-6A	256 kB	DAI DPI	ROM	768 kB	0 °C	70 °C	208-LQFP Exposed Pad	1.2 V	Floating Point	400 MHz	Surface Mount	3.3 V	208-LQFP-EP	28 mm	28 mm
Analog Devices Inc./Maxim Integrated ADSP-21369KSWZ-2A	256 kB	DAI DPI	ROM	768 kB	0 °C	70 °C	208-LQFP Exposed Pad	1.2 V	Floating Point	333 MHz	Surface Mount	3.3 V	208-LQFP-EP	28 mm	28 mm
Analog Devices Inc./Maxim Integrated ADSP-21369BSWZ-1A	256 kB	DAI DPI	ROM	768 kB	-40 °C	85 °C	208-LQFP Exposed Pad	1.2 V	Floating Point	266 MHz	Surface Mount	3.3 V	208-LQFP-EP	28 mm	28 mm
Analog Devices Inc./Maxim Integrated ADSP-21369KBPZ-3A	256 kB	DAI DPI	ROM	768 kB	0 °C	70 °C	256-LBGA Exposed Pad	1.2 V	Floating Point	400 MHz	Surface Mount	3.3 V	256-BGA-ED	27 mm	27 mm
Analog Devices Inc./Maxim Integrated ADSP-21369KBPZ-2A	256 kB	DAI DPI	ROM	768 kB	0 °C	70 °C	256-LBGA Exposed Pad	1.2 V	Floating Point	333 MHz	Surface Mount	3.3 V	256-BGA-ED	27 mm	27 mm
Analog Devices Inc./Maxim Integrated ADSP-21369KSWZ-4A	256 kB	DAI DPI	ROM	768 kB	0 °C	70 °C	208-LQFP Exposed Pad	1.2 V	Floating Point	350 MHz	Surface Mount	3.3 V	208-LQFP-EP	28 mm	28 mm
Analog Devices Inc./Maxim Integrated ADSP-21369KSWZ-1A	256 kB	DAI DPI	ROM	768 kB	0 °C	70 °C	208-LQFP Exposed Pad	1.2 V	Floating Point	266 MHz	Surface Mount	3.3 V	208-LQFP-EP	28 mm	28 mm
Analog Devices Inc./Maxim Integrated ADSP-21369KSWZ-5A	256 kB	DAI DPI	ROM	768 kB	0 °C	70 °C	208-LQFP Exposed Pad	1.2 V	Floating Point	366 MHz	Surface Mount	3.3 V	208-LQFP-EP	28 mm	28 mm
Analog Devices Inc./Maxim Integrated ADSP-21369BSWZ-2A	256 kB	DAI DPI	ROM	768 kB	-40 °C	85 °C	208-LQFP Exposed Pad	1.2 V	Floating Point	333 MHz	Surface Mount	3.3 V	208-LQFP-EP	28 mm	28 mm
Analog Devices Inc./Maxim Integrated ADSP-21369BBPZ-2A	256 kB	DAI DPI	ROM	768 kB	-40 °C	85 °C	256-LBGA Exposed Pad	1.2 V	Floating Point	333 MHz	Surface Mount	3.3 V	256-BGA-ED	27 mm	27 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$	Updated

Digikey	Tray	13	$ 62.35	<1d
Mouser	N/A	1	$ 67.27	1m+
		10	$ 50.76
		25	$ 50.70
		36	$ 50.68
		108	$ 50.67

CAD

3D models and CAD resources for this part

Description

General part information

ADSP-21369 Series

The third generation of SHARC®Processors offers increased performance, audio and application-focused peripherals, and new memory configurations. The ADSP-21369 increases performance to 400MHz while simplifying algorithm development with the integration of a high-bandwidth and very flexible external memory interface. The ADSP-21369 is based on a single-instruction, multiple-data (SIMD) core which supports both 32-bit fixed-point and 32-/40-bit floating point arithmetic formats and is completely code-compatible with all prior SHARC Processors allowing for maximum reuse of legacy code.The ADSP-21369 increases the amount of on-chip memory to 2Mb SRAM and 6Mb ROM while integrating a variety of audio-specific and general purpose peripherals. Peripherals such as an all digital S/PDIF transmitter/receiver, 8-channel asynchronous sample rate converter, 8 high-speed serial ports, 4 precision clock generators, and multiple serial interfaces combine to ensure the ADSP-21369 maximizes system throughput while minimizing system bill of materials costs.

Documents

Technical documentation and resources

ADSP-21369KSWZ-4A

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ADSP-21369KSWZ-4A

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Technical Specifications

ADSP-21369 Series

Pricing

CAD

Description

ADSP-21369 Series

Documents

ADSP-21369KSWZ-4A | Datasheet

EE-332: Cycle Counting and Profiling (Rev.2)

EE-253: Power Bypass Decoupling of SHARC® Processors (Rev.1)

VisualDSP++®5.0 Licensing Guide (Rev.1.4)

VisualDSP++®5.0 Loader and Utilities Manual (Rev.2.5)

EE-177: SHARC® SPI Slave Booting (Rev.3)

EE-68: Analog Devices JTAG Emulation Technical Reference (Rev.10)

EE-313: Land Pattern Compatibility Between 28x28 MQFP and LQFP Packages (Rev.1)

Package Drawing - 208-Lead LQFP (28mm x 28mm w/ EP)

Blackfin®/SHARC®USB EZ-Extender®Manual (Rev.1.1)

VisualDSP++®5.0 Kernel (VDK) Users Guide (Rev.3.5)

EE-128: DSP in C++: Calling Assembly Class Member Functions From C++

EE-320: Implementing an Ogg Vorbis Decoder on SHARC® Processors (Rev.1)

VisualDSP++®5.0 C/C++ Compiler Manual for SHARC®Processors (Rev.1.5)

EE-264: Interfacing MultiMediaCard™ with ADSP-2126x SHARC® Processors (Rev.1)

EE-296: Using the UART Port Controller on SHARC® Processors (Rev.2)

SHARC®USB EZ-Extender®Manual (Rev.2.1)

EZ-KIT Lite for Analog Devices ADSP-21369 SHARC Processor

ICE-100B Emulator User’s Guide (Rev.1.1)

ADSP-21369 EZ-KIT Lite®Evaluation System Manual (Rev.2.4)

VisualDSP++®5.0 Assembler and Preprocessor Manual (Rev.3.4)

ICE-1000/ICE-2000 Emulator User’s Guide (Rev.1.2)

VisualDSP++®5.0 Run-Time Library Manual for SHARC®Processors (Rev.1.5)

SHARC®Processor Programming Reference (Includes ADSP-2136x, ADSP-2137x, and ADSP-214xx Processors) (Rev.2.4)

EE-268: Programming Asynchronous Sample Rate Converters on ADSP-2136x SHARC® Processors (Rev.1)

EE-290: Managing the Core PLL on SHARC® Processors (Rev.5)

EE-223: In-Circuit Flash Programming on SHARC® Processors (Rev.2)

EE-299: Estimating Power Dissipation for ADSP-21368 SHARC Processors

EE-340: Connecting SHARC®and Blackfin®Processors over SPI (Rev.1)

EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev.1)

SHARC®Audio EZ-Extender®Manual (Rev.1.1)

EE-110: A Quick Primer on ELF and DWARF File Formats

EE-69: Understanding and Using Linker Description Files on SHARC Processors (Rev.2)

EE-345: Boot Kernel Customization and Firmware Upgradeability on SHARC Processors® (Rev.1)

EE-191: Implementing a Glueless UART Using The SHARC® DSP SPORTs

VisualDSP++®5.0 Users Guide (Rev.3.0)

EE-231: In-Circuit Programming of an SPI Flash with SHARC® Processors (Rev.2)

EE-305: Designing and Debugging Systems with SHARC Processors (Rev.1)

HPUSB, USB, and HPPCI Emulator User’s Guide (Rev.3.2)

EE-56: Tips and Tricks on SHARC® EPROM and Host Boot Loader (Rev.3)

EE-189: Link Port Tips & Tricks For ADSP-2106x & ADSP-2116x SHARC® DSPs

EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev.14)

EE-270: Extended-Precision Fixed-Point Arithmetic on SIMD SHARC® Processors (Rev.1)

ADSP-2137x SHARC®Processor Hardware Reference (Rev.2.2)

EE-323: Implementing Dynamically Loaded Software Modules (Rev.1)

EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev.1)

EE-266: Programming S/PDIF on ADSP-2136x and ADSP-21371 SHARC® Processors (Rev.2)

EE-104: Setting Up Streams with the VisualDSP Debugger

VisualDSP++®5.0 Getting Started Guide (Rev.3.0)

VisualDSP++®5.0 Product Release Bulletin (Rev.3.0)

EE-322: Expert Code Generator for SHARC® Processors (Rev.5)

EE-328: Migrating from ADSP-2106x/2116x to ADSP-2126x/2136x/2137x SHARC® Processors (Rev.1)

EE-329: Running FAT16 File Systems and DOS Commands on SHARC® Processors (Rev.1)

EE-355: Expert In-Circuit FLASH Programmer for SHARC® Processors (Rev.1)

EE-260: Interfacing AD7865 Parallel ADCs to ADSP-2136x SHARC® Processors (Rev.1)

EE-202: Using the Expert Linker for Multiprocessor LDFs (Rev.3)

VisualDSP++®5.0 Quick Installation Reference Card (Rev.3.1)

SHARC®EZ-Extender®Manual (Rev.3.1)

EE-232: Configuring the Signal Routing Unit of ADSP-2126x SHARC® DSPs (Rev.1)

VisualDSP++®5.0 Linker and Utilities Manual (Rev.3.5)

EE-295: Implementing Delay Lines on SHARC® Processors (Rev.1)

EE-267: Implementing In-Place FFTs on SISD and SIMD SHARC® Processors (Rev.1)

EE-286: Interfacing SDRAM Memories to SHARC® Processors (Rev.5)

SHARC Processor Family

ADSP-21369 Series