74ALVC74PW,118
ActiveFLIP FLOPS DUAL D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE-EDGE TRIGGER
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74ALVC74PW,118
ActiveFLIP FLOPS DUAL D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE-EDGE TRIGGER
Technical Specifications
Parameters and characteristics for this part
| Specification | 74ALVC74PW,118 |
|---|---|
| Clock Frequency | 425 MHz |
| Current - Output High, Low [custom] | 24 mA |
| Current - Output High, Low [custom] | 24 mA |
| Current - Quiescent (Iq) | 10 µA |
| Function | Set(Preset) and Reset |
| Input Capacitance | 3.5 pF |
| Max Propagation Delay @ V, Max CL | 3.8 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 1 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 85 C |
| Operating Temperature [Min] | -40 ¯C |
| Output Type | Complementary |
| Package / Case | 14-TSSOP |
| Package / Case [x] | 0.173 ", 4.4 mm |
| Supplier Device Package | 14-TSSOP |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Description
General part information
74ALVC74PW Series
The 74ALVC74 is a dual positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q andQoutputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.
Documents
Technical documentation and resources