
ADSP-2185BSTZ-133
Active16-BIT, 33 MIPS, 5 V, 2 SERIAL PORTS, HOST PORT, 80 KB RAM
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ADSP-2185BSTZ-133
Active16-BIT, 33 MIPS, 5 V, 2 SERIAL PORTS, HOST PORT, 80 KB RAM
Technical Specifications
Parameters and characteristics for this part
| Specification | ADSP-2185BSTZ-133 |
|---|---|
| Clock Rate (Frequency) | 33.3 MHz |
| Interface | Host Interface, Serial Port |
| Mounting Type | Surface Mount |
| Non-Volatile Memory Type | External |
| On-Chip RAM | 80 kB |
| Operating Temperature (Max) | 85 °C |
| Operating Temperature (Min) | -40 °C |
| Package / Case | 100-LQFP |
| Package Length | 14 mm |
| Package Name | 100-LQFP |
| Package Width | 14 mm |
| Type | Fixed Point |
| Voltage - Core | 5 V |
| Voltage - I/O | 5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | Updated |
|---|---|---|---|---|
| Digikey | Tray | 1 | $ 99.24 | <1d |
| 10 | $ 84.75 | |||
| 25 | $ 80.73 | |||
| 100 | $ 76.19 | |||
CAD
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Description
General part information
ADSP-2185 Series
The ADSP-2185 is a single-chip microcomputer optimized for digital signal processing (DSP) and other high speed numeric processing applications.The ADSP-2185 combines the ADSP-2100 family base architecture (three computational units, data address generators and a program sequencer) with two serial ports, a 16-bit internal DMA port, a byte DMA port, a programmable timer, Flag I/O, extensive interrupt capabilities and on-chip program and data memory.The ADSP-2185 integrates 80K bytes of on-chip memory configured as 16K words (24-bit) of program RAM and 16K words (16-bit) of data RAM. Power-down circuitry is also provided to meet the low power needs of battery operated portable equipment. The ADSP-2185 is available in 100-pin LQFP package.In addition, the ADSP-2185 supports new instructions, which include bit manipulations- bit set, bit clear, bit toggle, bit test- new ALU constants, new multiplication instruction (x squared), biased rounding, result free ALU operations, I/O memory transfers and global interrupt masking, for increased flexibility.
Documents
Technical documentation and resources