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64 QFN
Integrated Circuits (ICs)

LTC2208CUP-14#TRPBF

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Analog Devices Inc./Maxim Integrated

ANALOG TO DIGITAL CONVERTERS - ADC 14-B, 130MSPS ADC

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64 QFN
Integrated Circuits (ICs)

LTC2208CUP-14#TRPBF

Active
Analog Devices Inc./Maxim Integrated

ANALOG TO DIGITAL CONVERTERS - ADC 14-B, 130MSPS ADC

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationLTC2208CUP-14#TRPBF
ArchitecturePipelined
ConfigurationS/H-ADC
Data InterfaceParallel, LVDS - Parallel
FeaturesPGA
Input TypeDifferential
Mounting TypeSurface Mount
Number of A/D Converters1
Number of Bits14
Number of Inputs [custom]1
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Package / Case64-WFQFN Exposed Pad
Ratio - S/H:ADC1:1
Reference TypeInternal, External
Sampling Rate (Per Second)130 M per second
Supplier Device Package64-QFN
Supplier Device Package [x]9
Supplier Device Package [y]9
Voltage - Supply, Analog [Max]3.465 V
Voltage - Supply, Analog [Min]3.135 V
Voltage - Supply, Digital [Max]3.465 V
Voltage - Supply, Digital [Min]3.135 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$Updated
DigikeyN/A 0$ 88.441m+
Tape & Reel (TR) 2000$ 88.441m+
MouserN/A 2000$ 88.431m+

Description

General part information

LTC2208 Series

The LTC2208-14 is a 130Msps, sampling 14-bit A/D converter designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 700MHz. The input range of the ADC can be optimized with the PGA front end.The LTC2208-14 is perfect for demanding communications applications, with AC performance that includes 77.1dBFS Noise Floor and 98dB spurious free dynamic range (SFDR). Ultralow jitter of 70fsRMSallows undersampling of high input frequencies with excellent noise performance. Maximum DC specs include ±1.5LSB INL, ±0.5LSB DNL (no missing codes).The digital output can be either differential LVDS or single-ended CMOS. There are two format options for the CMOS outputs: a single bus running at the full data rate or demultiplexed buses running at half data rate. A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V.The ENC+and ENC–inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles.BitsLTC2208-1414LTC2208-1616ApplicationsTelecommunicationsReceiversCellular Base StationsSpectrum AnalysisImaging SystemsATE