74LVC1G80GV,125
ActiveFLIP FLOP, 74LVC1G80, D, 6 NS, 400 MHZ, 32 MA, 5 PINS, TSOP
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74LVC1G80GV,125
ActiveFLIP FLOP, 74LVC1G80, D, 6 NS, 400 MHZ, 32 MA, 5 PINS, TSOP
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Technical Specifications
Parameters and characteristics for this part
| Specification | 74LVC1G80GV,125 |
|---|---|
| Clock Frequency | 400 MHz |
| Current - Output High, Low | 32 mA, 32 mA |
| Current - Quiescent (Iq) | 200 µA |
| Function | Standard |
| Input Capacitance | 5 pF |
| Max Propagation Delay @ V, Max CL | 4.5 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 1 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | FA2, Pico-SPOX |
| Package / Case | SOT-753, SC-74A |
| Supplier Device Package | SC-74A |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Description
General part information
74LVC1G80GV Series
The 74LVC1G80 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and its complement will appear at theQoutput. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Documents
Technical documentation and resources