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ROHM RQ6E030ATTCR
Discrete Semiconductor Products

QS6K21FRATR

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Rohm Semiconductor

45V NCH+NCH SMALL SIGNAL MOSFET

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ROHM RQ6E030ATTCR
Discrete Semiconductor Products

QS6K21FRATR

Active
Rohm Semiconductor

45V NCH+NCH SMALL SIGNAL MOSFET

Technical Specifications

Parameters and characteristics for this part

SpecificationQS6K21FRATR
Configuration2 N-Channel (Dual)
Current - Continuous Drain (Id) @ 25°C1 A
Drain to Source Voltage (Vdss)45 V
Gate Charge (Qg) (Max) @ Vgs2.1 nC
GradeAutomotive
Input Capacitance (Ciss) (Max) @ Vds [Max]95 pF
Mounting TypeSurface Mount
Operating Temperature150 °C
Package / CaseSOT-23-6 Thin, TSOT-23-6
Power - Max [Max]950 mW
QualificationAEC-Q101
Rds On (Max) @ Id, Vgs420 mOhm
Supplier Device PackageTSMT6 (SC-95)
TechnologyMOSFET (Metal Oxide)
Vgs(th) (Max) @ Id1.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyN/A 8948$ 0.90
NewarkEach (Supplied on Cut Tape) 1$ 0.87
10$ 0.66
25$ 0.58
50$ 0.51
100$ 0.44
250$ 0.39
500$ 0.34
1000$ 0.31

Description

General part information

QS6K21FRA Series

Complex type MOSFETs(N+N) are made as low ON-resistance devices by the micro-processing technologies useful for wide range of applications. Broad lineup covering compact types, high-power types and complex types to meet various needs in the market.

Documents

Technical documentation and resources

Technical Data Sheet EN

Datasheet

Method for Monitoring Switching Waveform

Schematic Design & Verification

How to Use LTspice® Models: Tips for Improving Convergence

Schematic Design & Verification

TSMT6_TR Taping Information

Package Information

Compliance of the RoHS directive

Environmental Data

Package Dimensions

Package Information

Types and Features of Transistors

Application Note

Overview of ROHM's Simulation Models(for ICs and Discrete Semiconductors)

Technical Article

Two-Resistor Model for Thermal Simulation

Thermal Design

Importance of Probe Calibration When Measuring Power: Deskew

Schematic Design & Verification

About Flammability of Materials

Environmental Data

Condition of Soldering / Land Pattern Reference

Package Information

Notes for Temperature Measurement Using Forward Voltage of PN Junction

Thermal Design

MOSFET Gate Resistor Setting for Motor Driving

Technical Article

Calculation of Power Dissipation in Switching Circuit

Schematic Design & Verification

Method for Calculating Junction Temperature from Transient Thermal Resistance Data

Thermal Design

PCB Layout Thermal Design Guide

Thermal Design

Temperature derating method for Safe Operating Area (SOA)

Schematic Design & Verification

About Export Regulations

Export Information

What Is Thermal Design

Thermal Design

Reliability Test Result

Manufacturing Data

Measurement Method and Usage of Thermal Resistance RthJC

Thermal Design

Moisture Sensitivity Level - Transistors

Package Information

QS6K21FRA ESD Data

Characteristics Data

Basics of Thermal Resistance and Heat Dissipation

Thermal Design

What is a Thermal Model? (Transistor)

Thermal Design

Certificate of not containing SVHC under REACH Regulation

Environmental Data

List of Transistor Package Thermal Resistance

Thermal Design

How to Create Symbols for PSpice Models

Models

Notes for Calculating Power Consumption:Static Operation

Thermal Design

θ<sub>JC</sub> and Ψ<sub>JT</sub>

Thermal Design

Anti-Whisker formation - Transistors

Package Information

Precautions When Measuring the Rear of the Package with a Thermocouple

Thermal Design

MOSFET Gate Drive Current Setting for Motor Driving

Technical Article

Notes for Temperature Measurement Using Thermocouples

Thermal Design

θ<sub>JA</sub> and Ψ<sub>JT</sub>

Thermal Design

Inner Structure

Package Information

Part Explanation

Application Note

How to Use the Thermal Resistance and Thermal Characteristics Parameters

Thermal Design

Judgment Criteria of Thermal Evaluation

Thermal Design

Impedance Characteristics of Bypass Capacitor

Schematic Design & Verification

Explanation for Marking

Package Information

How to Use LTspice&reg; Models

Schematic Design & Verification