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Technical Specifications
Parameters and characteristics for this part
| Specification | LP2997M |
|---|---|
| Applications | DDR-II Terminator |
| Current - Supply | 320 µA |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | 0 °C |
| Package / Case | 8-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Supplier Device Package | 8-SOIC |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 2.2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
LP2997 Series
The LP2997 linear regulator is designed to meet the JEDEC SSTL-18 specifications for termination of DDR-II memory. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 500mA continuous current and transient peaks up to 900mA in the application as required for DDR-II SDRAM termination. The LP2997 also incorporates a VSENSEpin to provide superior load regulation and a VREFoutput as a reference for the chipset and DIMMs.
An additional feature found on the LP2997 is an active low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. WhenSDis pulled low the VTToutput will tri-state providing a high impedance output, but, VREFwill remain active. A power savings advantage can be obtained in this mode through lower quiescent current.
The LP2997 linear regulator is designed to meet the JEDEC SSTL-18 specifications for termination of DDR-II memory. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 500mA continuous current and transient peaks up to 900mA in the application as required for DDR-II SDRAM termination. The LP2997 also incorporates a VSENSEpin to provide superior load regulation and a VREFoutput as a reference for the chipset and DIMMs.
Documents
Technical documentation and resources
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