Integrated Circuits (ICs)

SN74ABT574ADB

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Texas Instruments

D-TYPE FLIP-FLOPS

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Integrated Circuits (ICs)

SN74ABT574ADB

Active

Texas Instruments

D-TYPE FLIP-FLOPS

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DocumentsDatasheet

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74ABT574ADB

Clock Frequency	200 MHz
Current - Output High, Low [custom]	64 mA
Current - Output High, Low [custom]	32 mA
Function	Standard
Input Capacitance	3.5 pF
Max Propagation Delay @ V, Max CL	6.6 ns
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State, Non-Inverted
Package / Case	20-SSOP
Supplier Device Package	20-SSOP
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74ABT574A Series

Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs

Part	Trigger Type	Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case	Function	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Mounting Type	Clock Frequency	Input Capacitance	Number of Bits per Element	Operating Temperature [Max]	Operating Temperature [Min]	Max Propagation Delay @ V, Max CL	Number of Elements	Output Type	Supplier Device Package	Package / Case [y]	Package / Case [y]	Package / Case [x]	Package / Case	Package / Case
Texas Instruments SN74ABT574ARGYR	Positive Edge	D-Type	4.5 V	5.5 V	20-VFQFN Exposed Pad	Standard	64 mA	32 mA	Surface Mount	200 MHz	3.5 pF	8	85 °C	-40 °C	6.6 ns	1	Non-Inverted Tri-State	20-VQFN (3.5x4.5)
Texas Instruments SN74ABT574DWR
Texas Instruments SN74ABT574ADWR	Positive Edge	D-Type	4.5 V	5.5 V	20-SOIC	Standard	64 mA	32 mA	Surface Mount	200 MHz	3.5 pF	8	85 °C	-40 °C	4.8 ns	1	Non-Inverted Tri-State	20-SOIC	0.295 in	7.5 mm
Texas Instruments SN74ABT574APW	Positive Edge	D-Type	4.5 V	5.5 V	20-TSSOP	Standard	64 mA	32 mA	Surface Mount	200 MHz	3.5 pF	8	85 °C	-40 °C	6.6 ns	1	Non-Inverted Tri-State	20-TSSOP	4.4 mm		0.173 in
Texas Instruments SN74ABT574ADW	Positive Edge	D-Type	4.5 V	5.5 V	20-SOIC	Standard	64 mA	32 mA	Surface Mount	200 MHz	3.5 pF	8	85 °C	-40 °C	4.8 ns	1	Non-Inverted Tri-State	20-SOIC	0.295 in	7.5 mm
Texas Instruments SN74ABT574ANG4	Positive Edge	D-Type	4.5 V	5.5 V	20-DIP	Standard	64 mA	32 mA	Through Hole	200 MHz	3.5 pF	8	85 °C	-40 °C	6.6 ns	1	Non-Inverted Tri-State	20-PDIP				7.62 mm	0.3 in
Texas Instruments SN74ABT574ANSRG4	Positive Edge	D-Type	4.5 V	5.5 V	20-SOIC	Standard	64 mA	32 mA	Surface Mount	200 MHz	3.5 pF	8	85 °C	-40 °C	6.6 ns	1	Non-Inverted Tri-State	20-SO				5.3 mm	0.209 "
Texas Instruments SN74ABT574ADBR	Positive Edge	D-Type	4.5 V	5.5 V	20-SSOP	Standard	64 mA	32 mA	Surface Mount	200 MHz	3.5 pF	8	85 °C	-40 °C	6.6 ns	1	Non-Inverted Tri-State	20-SSOP
Texas Instruments SN74ABT574ADB	Positive Edge	D-Type	4.5 V	5.5 V	20-SSOP	Standard	64 mA	32 mA	Surface Mount	200 MHz	3.5 pF	8	85 °C	-40 °C	6.6 ns	1	Non-Inverted Tri-State	20-SSOP
Texas Instruments SN74ABT574ANSR	Positive Edge	D-Type	4.5 V	5.5 V	20-SOIC	Standard	64 mA	32 mA	Surface Mount	200 MHz	3.5 pF	8	85 °C	-40 °C	6.6 ns	1	Non-Inverted Tri-State	20-SO				5.3 mm	0.209 "

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Bulk	468	$ 0.64

Description

General part information

SN74ABT574A Series

These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the SN54ABT574 and SN74ABT574A are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

Documents

Technical documentation and resources