SN74F240NS

Obsolete

Texas Instruments

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Integrated Circuits (ICs)

SN74F240NS

Obsolete

Texas Instruments

PROTOTYPE

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Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74F240NS

Current - Output High, Low [custom]	64 mA
Current - Output High, Low [custom]	15 mA
Logic Type	Inverting, Buffer
Mounting Type	Surface Mount
Number of Bits per Element	4
Number of Elements	2
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Output Type	3-State
Package / Case	20-SOIC
Package / Case	0.209 "
Package / Case	5.3 mm
Supplier Device Package	20-SO
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74F240 Series

8-ch, 4.5-V to 5.5-V bipolar inverters with 3-state outputs

Part	Mounting Type	Package / Case	Package / Case	Package / Case	Number of Bits per Element	Logic Type	Output Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Supplier Device Package	Number of Elements	Voltage - Supply [Min]	Voltage - Supply [Max]	Operating Temperature [Max]	Package / Case [y]	Package / Case [y]
Texas Instruments SN74F240N	Through Hole	20-DIP	7.62 mm	0.3 in	4	Buffer Inverting	3-State	64 mA	15 mA	20-PDIP	2	4.5 V	5.5 V	70 °C
Texas Instruments SN74F240NS	Surface Mount	20-SOIC	5.3 mm	0.209 "	4	Buffer Inverting	3-State	64 mA	15 mA	20-SO	2	4.5 V	5.5 V	70 °C
Texas Instruments SN74F240NSR	Surface Mount	20-SOIC	5.3 mm	0.209 "	4	Buffer Inverting	3-State	64 mA	15 mA	20-SO	2	4.5 V	5.5 V	70 °C
Texas Instruments SN74F240DW	Surface Mount	20-SOIC			4	Buffer Inverting	3-State	64 mA	15 mA	20-SOIC	2	4.5 V	5.5 V	70 °C	0.295 in	7.5 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Description

General part information

SN74F240 Series

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the ´F241 and ´F244, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical(active-low output-enable) inputs, and complementary OE andinputs.

The ´F240 is organized as two 4-bit buffers/line drivers with separate output enable () inputs. Whenis low, the device passes data from the A inputs to the Y outputs. Whenis high, the outputs are in the high-impedance state.

The SN74F240 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

Documents

Technical documentation and resources