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Technical Specifications
Parameters and characteristics for this part
| Specification | RM42L432PZT |
|---|---|
| Connectivity | LINbus, SCI, SPI, CANbus, MibSPI, UART/USART |
| Core Processor | ARM® Cortex®-R4F |
| Core Size [Max] | 32 Bit |
| Core Size [Min] | 16 Bit |
| Data Converters [custom] | 16 |
| Data Converters [custom] | 12 b |
| EEPROM Size | 16 K |
| Mounting Type | Surface Mount |
| Number of I/O | 45 |
| Operating Temperature [Max] | 105 °C |
| Operating Temperature [Min] | -40 °C |
| Oscillator Type | External |
| Package / Case | 100-LQFP |
| Peripherals | POR, PWM, WDT |
| Program Memory Size | 384 KB |
| Program Memory Type | FLASH |
| Speed | 100 MHz |
| Supplier Device Package | 100-LQFP (14x14) |
| Voltage - Supply (Vcc/Vdd) [Max] | 1.32 V |
| Voltage - Supply (Vcc/Vdd) [Min] | 1.14 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
RM42L432 Series
The RM42L432 device is a high-performance microcontroller for safety systems. The safety architecture includes dual CPUs in lockstep, CPU and Memory BIST logic, ECC on both the flash and the data SRAM, parity on peripheral memories, and loopback capability on peripheral I/Os.
The RM42L432 device integrates the ARM Cortex-R4 CPU. The CPU offers an efficient 1.66 DMIPS/MHz, and has configurations that can run up to 100 MHz, providing up to 166 DMIPS. The device operates in little-endian (LE) mode.
The RM42L432 device has 384KB of integrated flash and 32KB of data RAM. Both the flash and RAM have single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable, and programmable memory implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as I/O supply) for all read, program, and erase operations. When in pipeline mode, the flash operates with a system clock frequency of up to 100 MHz. The SRAM supports single-cycle read and write accesses in byte, halfword, word, and double-word modes throughout the supported frequency range.
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