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5T9050 - Block Diagram
Integrated Circuits (ICs)

5T9050PGGI

Obsolete
Renesas Electronics Corporation

1-TO-5 LVCMOS/LVTTL FANOUT BUFFER

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5T9050 - Block Diagram
Integrated Circuits (ICs)

5T9050PGGI

Obsolete
Renesas Electronics Corporation

1-TO-5 LVCMOS/LVTTL FANOUT BUFFER

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

Specification5T9050PGGI
Differential - Input:Output [custom]False
Differential - Input:Output [custom]False
Frequency - Max [Max]200 MHz
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 C
OutputLVTTL, LVCMOS
Package / Case4.4 mm, 0.173 "
Package / Case28-TSSOP
Ratio - Input:Output1:5
Supplier Device Package28-TSSOP
TypeFanout Buffer (Distribution)
Voltage - Supply [Max]2.7 V
Voltage - Supply [Min]2.3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyN/A 29718$ 3.44

Description

General part information

5T9050 Series

The 5T9050 2.5V single data rate (SDR) clock buffer is a single-ended input to five single-ended outputs buffer built on advanced metal CMOS technology. The SDR clock buffer fanout from a single input to five single-ended outputs reduces the loading on the preceding driver and provides an efficient clock distribution network. Multiple power and grounds reduce noise.

Documents

Technical documentation and resources