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Nexperia-74AHCT374D,118 Flip Flops Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin SO T/R
Integrated Circuits (ICs)

74HC273D-Q100J

Active
Nexperia USA Inc.

FLIP FLOP D-TYPE BUS INTERFACE POS-EDGE 1-ELEMENT AUTOMOTIVE AEC-Q100 20-PIN SO T/R

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Nexperia-74AHCT374D,118 Flip Flops Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 20-Pin SO T/R
Integrated Circuits (ICs)

74HC273D-Q100J

Active
Nexperia USA Inc.

FLIP FLOP D-TYPE BUS INTERFACE POS-EDGE 1-ELEMENT AUTOMOTIVE AEC-Q100 20-PIN SO T/R

Technical Specifications

Parameters and characteristics for this part

Specification74HC273D-Q100J
Clock Frequency122 MHz
Current - Output High, Low [custom]5.2 mA
Current - Output High, Low [custom]5.2 mA
Current - Quiescent (Iq)8 ÁA
GradeAutomotive
Input Capacitance3.5 pF
Max Propagation Delay @ V, Max CL26 ns
Mounting TypeSurface Mount
Number of Bits per Element [custom]8
Number of Elements1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output TypeNon-Inverted
Package / Case20-SOIC (0.295", 7.50mm Width)
QualificationAEC-Q100
Supplier Device Package20-SO
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]6 V
Voltage - Supply [Min]2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyN/A 1921$ 0.79

Description

General part information

74HC273D-Q100 Series

The 74HC273-Q100; 74HCT273-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW onMRforces the outputs LOW independently of clock and data inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.