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48-QFN_05-08-1704
Integrated Circuits (ICs)

LTC2207IUK#TRPBF

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Analog Devices Inc./Maxim Integrated

1-CHANNEL SINGLE ADC PIPELINED 105MSPS 16-BIT PARALLEL 48-PIN QFN EP T/R

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48-QFN_05-08-1704
Integrated Circuits (ICs)

LTC2207IUK#TRPBF

Active
Analog Devices Inc./Maxim Integrated

1-CHANNEL SINGLE ADC PIPELINED 105MSPS 16-BIT PARALLEL 48-PIN QFN EP T/R

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationLTC2207IUK#TRPBF
ArchitecturePipelined
ConfigurationS/H-ADC
Data InterfaceParallel
FeaturesPGA
Input TypeDifferential
Mounting TypeSurface Mount
Number of A/D Converters1
Number of Bits16
Number of Inputs [custom]1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 C
Package / Case48-WFQFN Exposed Pad
Ratio - S/H:ADC1:1
Reference TypeInternal, External
Sampling Rate (Per Second)105 M
Supplier Device Package48-QFN (7x7)
Voltage - Supply, Analog [Max]3.465 V
Voltage - Supply, Analog [Min]3.135 V
Voltage - Supply, Digital [Max]3.465 V
Voltage - Supply, Digital [Min]3.135 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$Updated
DigikeyN/A 0$ 109.301m+
Tape & Reel (TR) 2000$ 109.301m+

Description

General part information

LTC2207 Series

The LTC2207/LTC2206 are 105Msps/80Msps, sampling 16-bit A/D converters designed for digitizing high frequency, wide dynamic range signals up to input frequencies of 700MHz. The input range of the ADC can be optimized with the PGA front end.The LTC2207/LTC2206 are perfect for demanding communications applications, with AC performance that includes 78.2dB Noise Floor and 100dB spurious free dynamic range (SFDR). Ultralow jitter of 80fsRMSallows undersampling of high input frequencies with excellent noise performance. Maximum DC specs include ±4LSB INL, ±1LSB DNL (no missing codes) over temperature.A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V.The ENC+and ENC–inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles.BitsLTC2207-1414LTC2207-1616ApplicationsTelecommunicationsReceiversCellular Base StationsSpectrum AnalysisImaging SystemsATE