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Technical Specifications

Parameters and characteristics for this part

SpecificationAD4052BCBZ-RL7
ArchitectureSAR
ConfigurationADC
Data InterfaceSPI
Input TypeSingle Ended, Differential
Mounting TypeSurface Mount
Number of A/D Converters1 count
Number of Bits16 bits
Number of Inputs1
Operating Temperature (Max)125 °C
Operating Temperature (Min)-40 °C
Package / Case16-UFBGA, WLCSP
Package Length1.67 mm
Package Name16-WLCSP
Package Width1.97 mm
Ratio - ADC1
Ratio - S/H0
Reference TypeExternal
Sampling Rate (Per Second)2 MHz
Voltage - Supply, Analog (Max)3.6 V
Voltage - Supply, Analog (Min)2.3 V
Voltage - Supply, Digital (Max)3.6 V
Voltage - Supply, Digital (Min)1.71 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$Updated
DigikeyTape & Reel (TR) 3000$ 11.71<3d

CAD

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Description

General part information

AD4052 Series

The AD4052/AD4058 areversatile, 16-bit, successive approximation register (SAR) analog-to-digital converter (ADC) that enables low-power, high-density data acquisition solutions without sacrificing precision. This ADC offers a unique balance of performance and power efficiency, plus innovative features for seamlessly switching between high-resolution and low-power modes tailored to the immediate needs of the system. The AD4052/AD4058 are ideal for battery-powered, compact data acquisition and edge sensing applications.The Easy Drive features enable highly efficient analog front end (AFE) designs. The small sampling capacitors (3.4 pF) maximize input impedance, thus reducing the dependence on high-bandwidth, power-hungry amplifiers typically required by SAR ADCs. The wide input common-mode range grants inherent support for both differential and single-ended signals.The AD4052/AD4058 support microcontrollers with power-down modes and interrupt-driven firmware. The autonomous modes enable out-of- range event detection while the digital host sleeps. The averaging modes deliver on-demand, high-resolution measurements while offloading computations from the host processor. The self-timed device enable signal (DEV_EN) synchronizes AFE device power cycling to the ADC sampling instant, optimizing system power consumption while minimizing power-up settling error artifacts. The AD4052/AD4058 also supports power cycling the voltage reference and using the supply as the ADC reference voltage (VREF) for additional power savings.Device configuration and ADC data readback are supported via a robust, 4-wire serial peripheral interface (SPI) with cyclic redundancy check (CRC) supported for all data transfers. The AD4052/AD4058 are available in compact LFCSP and WLCSP packages and operates across a wide temperature range, making it ideal for a diverse set of applications.APPLICATIONSBattery-powered data acquisitionVital signs monitoringBiological and chemical analysisGeologic and seismic sensingMotion and robotics