Specification	74LVC1G00GW,125

Current - Output High, Low	32 mA, 32 mA
Current - Quiescent (Max) [Max]	4 µA
Input Logic Level - High [Max]	2 V
Input Logic Level - High [Min]	1.7 V
Input Logic Level - Low [Max]	0.8 V
Input Logic Level - Low [Min]	0.7 V
Logic Type	NAND Gate
Max Propagation Delay @ V, Max CL	4 ns
Mounting Type	Surface Mount
Number of Circuits	1
Number of Inputs	2
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 C
Package / Case	SOT-353, SC-70-5, 5-TSSOP
Supplier Device Package	5-TSSOP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	1.65 V

74LVC1G00GW Series

Single 2-input NAND gate

Part	Input Logic Level - Low [Min]	Input Logic Level - Low [Max]	Number of Inputs	Operating Temperature [Max]	Operating Temperature [Min]	Max Propagation Delay @ V, Max CL	Logic Type	Package / Case	Voltage - Supply [Min]	Voltage - Supply [Max]	Current - Output High, Low	Number of Circuits	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Current - Quiescent (Max) [Max]	Supplier Device Package	Mounting Type
Nexperia USA Inc. 74LVC1G00GW,125	0.7 V	0.8 V	2	125 °C	-40 C	4 ns	NAND Gate	5-TSSOP SC-70-5 SOT-353	1.65 V	5.5 V	32 mA 32 mA	1	1.7 V	2 V	4 µA	5-TSSOP	Surface Mount

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	N/A	0	$ 0.14

Description

General part information

74LVC1G00GW Series

The 74LVC1G00 is a single 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.