STMicroelectronics

The EVLSRK1004A, EVLSRK1004B, EVLSRK1004C, and EVLSRK1004D are demonstration boards, designed for evaluation of the SRK1004x synchronous rectification controller. The SRK1004 is a controller intended for secondary side synchronous rectification (SR) in a Non-Complementary Active Clamp Flyback converter. It provides a gate-drive output suitable for N-channel logic-level or standard level power MOSFETs. The control scheme of this IC is such that the SR MOSFET is switched on as soon as current starts flowing through its body diode and it is then switched off as current approaches zero. The boards are provided with a setting suitable for ACF or QR application in low-side mode. In this case, the devices are supplied directly from the converter’s output voltage. When operated in high-side configuration, a special function enables a quick detection of short-circuit conditions to inhibit its operation as if the IC were powered directly from the output voltage. In the case that it is used in high-side configuration, it is recommended to power the board from a dedicated auxiliary winding and to use R5 > 36 K to configure Vout,sc (for short-circuit detection with Vout > 0 V). For example R5 = 150 K to configure Vout,sc = 2 V. The boards include the SR MOSFET (PowerFLAT 5 x 6 package) and can be easily implemented into an existing converter to substitute rectifier diodes.

The SRK2001 controller implements a control scheme specific for secondary side synchronous rectification in LLC resonant converters that use a transformer with center tap secondary winding for full wave rectification. It provides two high current gate drive outputs, each capable of directly driving one or more N-channel power MOSFET. Each gate driver is controlled separately and an interlock logic circuit prevents the two synchronous rectifier MOSFET from conducting simultaneously. The control scheme ensures that each synchronous rectifier is switched ON as the corresponding half-winding starts conducting and OFF as its current falls to zero. The turn-on logic with adaptive masking time and adaptive turn-off logic allow maximizing the conduction time of the SR MOSFET, eliminating the need for a parasitic inductance compensation circuit. The low consumption mode of the device allows meeting the most stringent requirements for converter power consumption in light-load and no-load conditions. A very low external component count is required when using this device.

The ST-ONE is the world’s first digital controller embedding ARM Cortex M0+ core, an offline programmable controller with synchronous rectification, and USB PD PHY in a single package. Such a system is specifically designed to control ZVS non-complementary active clamp flyback converters to create high power density chargers and adapters with USB-PD interface. The device includes an active clamp flyback controller and its HV startup on the primary side, a microcontroller and all the peripherals required to control the conversion and the USB-PD communication on the secondary side. The two sides are connected through an embedded galvanically isolated dual communication channel. By using a novel non-complementary control technique and specifically designed power modes the device allows to reach both high efficiency and low no load power consumption The device is delivered with a pre-loaded firmware which handles both the power conversion and the communication protocols for USB-PD including optional PPS and electronically marked cable management. A dedicated memory stores a default device configuration during factory process. The user can change or adapt this memory area to fit the final product specifications.

The ST-ONEHP is part of the ST-ONE® family, the world’s first digital controllers embedding ARM Cortex M0+ core, an offline programmable controller with synchronous rectification, and USB PD PHY in a single package. Such a system is specifically designed to control ZVS non-complementary active clamp flyback converters to create high power density chargers and adapters with EPR compliant USB-PD interface. The device includes an active clamp flyback controller and its HV startup on the primary side, a microcontroller and all the peripherals required to control the conversion and the USB-PD communication on the secondary side. The two sides are connected through an embedded galvanically isolated dual communication channel. By using a novel non-complementary control technique and specifically designed power modes the device allows to reach both high efficiency and low no load power consumption The device is delivered with a pre-loaded firmware which handles both the power conversion and the communication protocols for EPR USB-PD including AVS and electronically marked cable management. A dedicated memory stores a default device configuration during factory process. The user can change or adapt this memory area to fit the final product specifications.

The ST-ONEMP is the world’s first digital controller embedding ARM Cortex M0+ core, an offline programmable controller with synchronous rectification, and USB PD PHY in a single package. Such a system is specifically designed to control ZVS non-complementary active clamp flyback converters to create high power density chargers and adapters with a first USB-PD interface and a second output. The device includes an active clamp flyback controller and its HV startup on the primary side, a microcontroller and all the peripherals required to control the conversion and the USB-PD communication on the secondary side. The two sides are connected through an embedded galvanically isolated dual communication channel. By using a novel non-complementary control technique and specifically designed power modes the device allows to reach both high efficiency and low no load power consumption The device is delivered with a pre-loaded firmware which handles both the power conversion and the communication protocols for USB-PD including optional PPS and electronically marked cable management. The output power and available PDOs on the USB-PD port can be changed according to a power sharing pin input to allow power sharing with a second output. A dedicated memory stores a default device configuration during factory process. The user can change or adapt this memory area to fit the final product specifications.