| Gyroscopes | 1 | Obsolete | |
M24128-A125128-Kbit serial I2C bus EEPROM 105°C operation | Memory | 13 | Active | The M24128-A125 is a 128-Kbit serial EEPROM Automotive grade device operating up to 125 °C. The M24128-A125 is compliant with the very high level of reliability defined by the Automotive standard AEC-Q100 grade 1.
The device is accessed by a simple serial I2C compatible interface running up to 1 MHz.
The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M24128-A125 is a byte-alterable memory (16 K × 8 bits) organized as 256 pages of 64 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic.
The M24128-A125 offers an additional Identification Page (64 byte) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode. |
M24256-A125256-Kbit serial I2C bus EEPROM with configurable device address | Integrated Circuits (ICs) | 12 | Active | The M24256X-F is a 256-Kbit I2C-compatible EEPROM (electrically erasable programmable memory) organized as 32 K × 8 bits.
The M24256X-F can operate with a supply voltage from 1.65 V to 3.6 V, with a clock frequency up to 1 MHz, over an ambient temperature range from -40 °C to +85 °C. It can also operate down to 1.6 V, under some restricting conditions.
The M24256X-F offers three additional features, namely a 64-byte page, named identification page, which can be used to store sensitive application parameters that can be (later) permanently locked in read-only mode, a first 8-bit register, named configurable device address (CDA) register, authorizing the user, through software, to configure up to eight possibilities of chip enable address, and a second 8-bit register, named software write protection (SWP) register, authorizing the user, through software, to write protect a part or the full memory array. |
M24512-A125512Kbit Serial I2C bus EEPROM with configurable device address and software write protection registers | Integrated Circuits (ICs) | 12 | Active | The M24512-A125 is a 512-Kbit serial EEPROM Automotive grade device operating up to 125 °C. The M24512-A125 is compliant with the very high level of reliability defined by the Automotive standard AEC-Q100 grade 1.
The device is accessed by a simple serial I2C compatible interface running up to 1 MHz.
The memory array is based on advanced true EEPROM technology (Electrically Erasable PROgrammable Memory). The M24512-A125 is a byte-alterable memory (64 K × 8 bits) organized as 512 pages of 128 byte in which the data integrity is significantly improved with an embedded Error Correction Code logic.
The M24512-A125 offers an additional Identification Page (128 byte) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode. |
| Integrated Circuits (ICs) | 6 | Active | The M24C01(C02) is a 1(2)-Kbit I2C-compatible EEPROM (electrically erasable programmable memory) organized as 128 (256) × 8 bits.
The M24C01/02-W can be accessed with a supply voltage from 2.5 V to 5.5 V, the M24C01/02-R can be accessed with a supply voltage from 1.8 V to 5.5 V, and the M24C02-F can be accessed either with a supply voltage from 1.7 V to 5.5 V (over the full temperature range) or with an extended supply voltage from 1.6 V to 5.5 V under some restricted conditions. These devices operate with a maximum clock frequency of 400 kHz. |
M24C02-DRE2-Kbit serial I2C bus EEPROM 105°C operation | Integrated Circuits (ICs) | 10 | Active | The M24C02-DRE is a 2-Kbit serial EEPROM device operating up to 105 °C. The M24C02-DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2.
The device is accessed by a simple serial I2C compatible interface running up to 1 MHz.
The memory array is based on advanced true EEPROM technology (electrically erasable programmable memory). The M24C02-DRE is a byte-alterable memory (256 × 8 bits) organized as 16 pages of 16 bytes in which the data integrity is significantly improved with an embedded Error Correction Code logic.
The M24C02-DRE offers an additional Identification Page (16 bytes) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode. |
M24C04-A1254-Kbit serial I2C bus EEPROM 105°C operation | Integrated Circuits (ICs) | 14 | Active | The M24C04-A125 is a 4-Kbit serial EEPROM automotive grade device operating up to 125 °C. The M24C04-A125 is compliant with the very high level of reliability defined by the automotive standard AEC-Q100 grade 1.
The device is accessed by a simple serial I2C compatible interface running up to 1 MHz.
The memory array is based on advanced true EEPROM technology (electrically erasable programmable memory). The M24C04-A125 is a byte-alterable memory (512 × 8 bits) organized as 32 pages of 16 bytes in which the data integrity is significantly improved with an embedded error correction code logic.
The M24C04-A125 offers an additional identification page (16 bytes) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode. |
M24C08-DRE8-Kbit serial I2C bus EEPROM 105°C operation | Integrated Circuits (ICs) | 12 | Active | The M24C08-DRE is a 8-Kbit serial EEPROM device operating up to 105 °C. The M24C08-DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2.
The device is accessed by a simple serial I2C compatible interface running up to 1 MHz.
The memory array is based on advanced true EEPROM technology (electrically erasable programmable memory). The M24C08-DRE is a byte-alterable memory (1024 × 8 bits) organized as 64 pages of 16 bytes in which the data integrity is significantly improved with an embedded Error Correction Code logic.
The M24C08-DRE offers an additional Identification Page (16 bytes) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode. |
| Integrated Circuits (ICs) | 10 | Active | The M24C16-DFCU is a 16-Kbit I2C-compatible EEPROM assembled in a four balls ultra thin chip scale package (WLCSP).
The device is accessed by a simple serial I2C compatible interface running up to 1 MHz.
The M24C16-DFCU memory array is based on advanced true EEPROM technology (electrically erasable programmable memory), organized as 128 pages of 16 bytes, with a data integrity improved with an embedded Error Correction Code logic.
The M24C16-DFCU offers an additional page, named the identification page (16 byte). The identification page can be used to store sensitive application parameters which can be (later) permanently locked in read-only mode. |
M24C32-DRE32-Kbit serial I2C bus EEPROM 105°C operation | Integrated Circuits (ICs) | 7 | Active | The M24C32-DRE is a 32-Kbit serial EEPROM device operating up to 105 °C. The M24C32-DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2.
The device is accessed by a simple serial I2C compatible interface running up to 1 MHz.
The memory array is based on advanced true EEPROM technology (electrically erasable programmable memory). The M24C32-DRE is a byte-alterable memory (4 K × 8 bits) organized as 128 pages of 32 bytes in which the data integrity is significantly improved with an embedded Error Correction Code logic.
The M24C32-DRE offers an additional Identification Page (32 bytes) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode. |
