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Nexperia USA Inc.
| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
| Part | Spec A | Spec B | Spec C | Spec D | Description |
|---|---|---|---|---|---|
| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
| Part | Spec A | Spec B | Spec C | Spec D | Description |
|---|---|---|---|---|---|
| Part | Category | Description |
|---|---|---|
Nexperia USA Inc. | Discrete Semiconductor Products | TRANSISTOR GP BJT NPN 50V 3A 3-PIN SOT-89 T/R |
Nexperia USA Inc. | Discrete Semiconductor Products | PDTD143XT-Q/SOT23/TO-236AB |
Nexperia USA Inc. BAV99/DG/B3,235Obsolete | Discrete Semiconductor Products | DIODE ARRAY GEN PURP 100V 215MA |
Nexperia USA Inc. | Integrated Circuits (ICs) | 74HCS21PW-Q100/SOT402/TSSOP14 |
Nexperia USA Inc. | Discrete Semiconductor Products | SMALL SIGNAL MOSFET FOR MOBILE |
Nexperia USA Inc. LD6836TD/13P,125Obsolete | Integrated Circuits (ICs) | IC REG LINEAR 1.3V 300MA 5-TSOP |
Nexperia USA Inc. 74HC688PW,112Obsolete | Integrated Circuits (ICs) | IC ID COMPARATOR 8BIT 20-TSSOP |
Nexperia USA Inc. | Discrete Semiconductor Products | DIODE ZENER 6.2V 400MW SOD323 |
Nexperia USA Inc. | Discrete Semiconductor Products | SMALL SIGNAL MOSFETS FOR AUTOMOT |
Nexperia USA Inc. 74ALVT16373DGG,512Obsolete | Integrated Circuits (ICs) | IC D-TYPE TRANSP 8:8 48-TSSOP |
| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
74AUP1G175GWLow-power D-type flip-flop with reset; positive-edge trigger | Integrated Circuits (ICs) | 1 | Active | The 74AUP1G175 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), master reset (MR) inputs, and Q output. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. A LOW onMRcauses the flip-flop and output to be reset to LOW. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCCrange from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |
74AUP1G175GW-Q100Low-power D-type flip-flop with reset; positive-edge trigger | Logic | 1 | Active | The 74AUP1G175 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), master reset (MR) inputs, and Q output. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. A LOW onMRcauses the flip-flop and output to be reset to LOW. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCCrange from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |
74AUP1G17GMLow-power Schmitt trigger | Integrated Circuits (ICs) | 1 | Active | The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCCrange from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |
74AUP1G17GNLow-power Schmitt trigger | Buffers, Drivers, Receivers, Transceivers | 1 | Active | The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCCrange from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |
74AUP1G17GSLow-power Schmitt trigger | Integrated Circuits (ICs) | 1 | Active | The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCCrange from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |
74AUP1G17GVLow-power Schmitt trigger | Logic | 1 | Active | The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCCrange from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |
| Logic | 1 | Active | ||
74AUP1G17GW-Q100Low-power Schmitt trigger | Logic | 1 | Active | The 74AUP1G17-Q100 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCCrange from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |
74AUP1G17GXLow-power Schmitt trigger | Logic | 1 | Active | The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCCrange from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |
74AUP1G17GX4Low-power Schmitt trigger | Buffers, Drivers, Receivers, Transceivers | 1 | Active | The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and dynamic power consumption across the entire VCCrange from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |