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Nexperia USA Inc.
| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
| Part | Spec A | Spec B | Spec C | Spec D | Description |
|---|---|---|---|---|---|
| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
| Part | Spec A | Spec B | Spec C | Spec D | Description |
|---|---|---|---|---|---|
| Part | Category | Description |
|---|---|---|
Nexperia USA Inc. | Discrete Semiconductor Products | TRANSISTOR GP BJT NPN 50V 3A 3-PIN SOT-89 T/R |
Nexperia USA Inc. | Discrete Semiconductor Products | PDTD143XT-Q/SOT23/TO-236AB |
Nexperia USA Inc. BAV99/DG/B3,235Obsolete | Discrete Semiconductor Products | DIODE ARRAY GEN PURP 100V 215MA |
Nexperia USA Inc. | Integrated Circuits (ICs) | 74HCS21PW-Q100/SOT402/TSSOP14 |
Nexperia USA Inc. | Discrete Semiconductor Products | SMALL SIGNAL MOSFET FOR MOBILE |
Nexperia USA Inc. LD6836TD/13P,125Obsolete | Integrated Circuits (ICs) | IC REG LINEAR 1.3V 300MA 5-TSOP |
Nexperia USA Inc. 74HC688PW,112Obsolete | Integrated Circuits (ICs) | IC ID COMPARATOR 8BIT 20-TSSOP |
Nexperia USA Inc. | Discrete Semiconductor Products | DIODE ZENER 6.2V 400MW SOD323 |
Nexperia USA Inc. | Discrete Semiconductor Products | SMALL SIGNAL MOSFETS FOR AUTOMOT |
Nexperia USA Inc. 74ALVT16373DGG,512Obsolete | Integrated Circuits (ICs) | IC D-TYPE TRANSP 8:8 48-TSSOP |
| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
74AHCT3G14Triple inverting Schmitt trigger | Integrated Circuits (ICs) | 5 | Active | The 74AHC3G14-Q100; 74AHCT3G14-Q100 is a triple inverter with Schmitt-trigger inputs. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. |
74AHCT541Octal buffer/line driver; 3-state | Integrated Circuits (ICs) | 9 | Active | The 74AHC541-Q100; 74AHCT541-Q100 is an 8-bit buffer/line driver with 3-state outputs. The device features two output enables (OE1 andOE2). A HIGH onOEn causes the associated outputs to assume a high-impedance OFF-state. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. |
74AHCT541PWOctal buffer/line driver; 3-state | Integrated Circuits (ICs) | 1 | Active | The 74AHC541; 74AHCT541 is an 8-bit buffer/line driver with 3-state outputs. The device features two output enables (OE1 andOE2). A HIGH onOEn causes the associated outputs to assume a high-impedance OFF-state. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. |
74AHCT573BQOctal D-type transparent latch; 3-state | Logic | 1 | Active | The 74AHC573; 74AHCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH onOEcauses the outputs to assume a high-impedance OFF-state. Operation of theOEinput does not affect the state of the latches. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. |
74AHCT573BQ-Q100Octal D-type transparent latch; 3-state | Latches | 1 | Active | The 74AHC573-Q100; 74AHCT573-Q100 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH onOEcauses the outputs to assume a high-impedance OFF-state. Operation of theOEinput does not affect the state of the latches. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. |
| Logic | 1 | Active | ||
74AHCT573D-Q100Octal D-type transparent latch; 3-state | Integrated Circuits (ICs) | 1 | Active | The 74AHC573-Q100; 74AHCT573-Q100 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH onOEcauses the outputs to assume a high-impedance OFF-state. Operation of theOEinput does not affect the state of the latches. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. |
74AHCT573PWOctal D-type transparent latch; 3-state | Logic | 1 | Active | The 74AHC573; 74AHCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH onOEcauses the outputs to assume a high-impedance OFF-state. Operation of theOEinput does not affect the state of the latches. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. |
74AHCT573PW-Q100Octal D-type transparent latch; 3-state | Logic | 1 | Active | The 74AHC573-Q100; 74AHCT573-Q100 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH onOEcauses the outputs to assume a high-impedance OFF-state. Operation of theOEinput does not affect the state of the latches. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. |
74AHCT574Octal D-type flip-flop; positive edge-trigger; 3-state | Logic | 2 | Active | The 74AHC574; 74AHCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH onOEcauses the outputs to assume a high-impedance OFF-state. Operation of theOEinput does not affect the state of the flip-flops. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. |