| Logic | 1 | Active | The 74VHC02-Q100; 74VHCT02-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. |
| Logic | 1 | Active | The 74VHC02; 74VHCT02 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. |
| Integrated Circuits (ICs) | 1 | Active | The 74VHC02-Q100; 74VHCT02-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. |
| Logic | 1 | Active | The 74VHC08-Q100; 74VHCT08-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. |
| Logic | 1 | Active | The 74VHC08; 74VHCT08 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. |
| Logic | 1 | Active | The 74VHC08-Q100; 74VHCT08-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. |
| Logic | 1 | Active | The 74VHC08; 74VHCT08 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. |
| Logic | 1 | Active | The 74VHC08-Q100; 74VHCT08-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. |
| Integrated Circuits (ICs) | 1 | Active | The 74VHC08; 74VHCT08 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. |
74VHC125Quad buffer/line driver; 3-state | Integrated Circuits (ICs) | 2 | Active | The 74VHC125; 74VHCT125 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A. |