| Buffers, Drivers, Receivers, Transceivers | 1 | Active | The 74LVT125; 74LVTH125 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A HIGH on nOEcauses the outputs to assume a high impedance OFF-state. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |
| Logic | 7 | Active | The 74LVT126 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A LOW on nOE causes the outputs to assume a high impedance OFF-state. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |
74LVT143.3 V hex inverter Schmitt trigger | Logic | 5 | Active | The 74LVT14 is a hex inverter with Schmitt-trigger inputs. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |
| Logic | 1 | Active | The 74LVT14 is a hex inverter with Schmitt-trigger inputs. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |
| Logic | 1 | Active | The 74LVT14 is a hex inverter with Schmitt-trigger inputs. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. |
74LVT162240ADGG3.3 V 16-bit inverting buffer/driver with 30 Ω termination resistors; 3-state | Buffers, Drivers, Receivers, Transceivers | 1 | Active | The 74LVT162240A is a high-performance BiCMOS product designed for VCCoperation at 3.3 V. |
| Buffers, Drivers, Receivers, Transceivers | 3 | Active | |
| Buffers, Drivers, Receivers, Transceivers | 4 | Active | |
| Integrated Circuits (ICs) | 1 | NRND | |
74LVT162373DGG3.3 V 16-bit transparent D-type latch with 30 Ohm termination resistors; 3-state | Integrated Circuits (ICs) | 1 | Active | The 74LVT162373 is a high-performance BiCMOS product designed for VCCoperation at 3.3 V. |
