74HCT43518-channel analog multiplexer/demultiplexer with latch | Analog Switches, Multiplexers, Demultiplexers | 4 | Active | The 74HC4351; 74HCT4351 is a single-pole octal-throw analog switch (SP8T) suitable for use in analog or digital 8:1 multiplexer/demultiplexer applications. The switch features three digital select inputs (S0 to S2), eight independent inputs/outputs (Yn), a common input/output (Z) and two digital enable inputs (E1 and E2). WithE1 LOW and E2 HIGH, one of the eight switches is selected (low impedance ON-state) by S0 to S2. The data at the select inputs may be latched by using the latch enable input (LE). WhenLEis HIGH the latch is transparent. WhenE1 is HIGH or E2 is LOW all 8 analog switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
| Interface | 1 | Active | The 74HC4351-Q100; 74HCT4351-Q100 is a single-pole octal-throw analog switch (SP8T) suitable for use in analog or digital 8:1 multiplexer/demultiplexer applications. The switch features three digital select inputs (S0 to S2), eight independent inputs/outputs (Yn), a common input/output (Z) and two digital enable inputs (E1 and E2). WithE1 LOW and E2 HIGH, one of the eight switches is selected (low impedance ON-state) by S0 to S2. The data at the select inputs may be latched by using the latch enable input (LE). WhenLEis HIGH the latch is transparent. WhenE1 is HIGH or E2 is LOW all 8 analog switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
| Integrated Circuits (ICs) | 1 | Obsolete | |
| Display Drivers | 1 | Active | The 74HC4511; 74HCT4511 is a BCD to 7-segment latch/decoder/driver with four address inputs (A, B, C, D), a latch enable input (LE), a ripple blanking input (BI), a lamp test input (LT), and seven segment outputs (a to g). WhenLEis LOW, the state of the segment outputs (a to g) is determined by the data on A to D. WhenLEgoes HIGH, the last data present on A to D are stored in the latches and the segment outputs remain stable. WhenLTis LOW, all the segment outputs are HIGH independent of all other input conditions. WithLTHIGH, a LOW onBIforces all segment outputs LOW. The inputsLTandBIdo not affect the latch circuit. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
74HCT45144-to-16 line decoder/demultiplexer with input latches | Signal Switches, Multiplexers, Decoders | 3 | Active | The 74HC4514; 74HCT4514 is a 4-to-16 line decoder/demultiplexer having four binary weighted address inputs (A0 to A3), with latches, a latch enable input (LE), an enable input (E) and 16 outputs (Q0 to Q15). When LE is HIGH, the selected output is determined by the data on An. When LE goes LOW, the last data present at An are stored in the latches and the outputs remain stable. WhenEis LOW, the selected output, determined by the contents of the latch, is HIGH. AtEHIGH, all outputs are LOW. The enable inputEdoes not affect the state of the latch. When the device is used as a demultiplexer,Eis the data input and A0 to A3 are the address inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
74HCT4520Dual 4-bit synchronous binary counter | Counters, Dividers | 3 | Active | The 74HC4520-Q100; 74HCT4520-Q100 are dual 4-bit internally synchronous binary counters with two clock inputs (nCP0 and nCP1). They have buffered outputs from all 4 bit positions (nQ0 to nQ3), and an asynchronous master reset input (nMR). The counter advances on either the LOW-to-HIGH transition of nCP0 when nCP1 is HIGH. It also advances on the HIGH-to-LOW transition of nCP1 if nCP0 is LOW. Either nCP0 or nCP1 may be used as the clock input to the counter. The other clock input may be used as a clock enable input. A HIGH on nMR resets the counter (nQ0 to nQ3 = LOW) independent of nCP0 and nCP1. Inputs include clamp diodes. It enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
| Integrated Circuits (ICs) | 1 | Active | The 74HC4520; 74HCT4520 are dual 4-bit internally synchronous binary counters with two clock inputs (nCP0 and nCP1). They have buffered outputs from all 4 bit positions (nQ0 to nQ3) and an asynchronous master reset input (nMR). The counter advances on the LOW-to-HIGH transition of nCP0 when nCP1 is HIGH. It also advances on the HIGH-to-LOW transition of nCP1 when nCP0 is LOW. Either nCP0 or nCP1 may be used as the clock input to the counter. The other clock input may be used as a clock enable input. A HIGH on nMR, resets the counter (nQ0 to nQ3 = LOW) independent of nCP0 and nCP1. Inputs include clamp diodes. It enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
74HCT4538Dual retriggerable precision monostable multivibrator | Logic | 5 | Active | The 74HCT4538 is a dual retriggerable-resettable monostable multivibrator. Each multivibrator has two trigger/retrigger inputs (nAand nB), a direct reset input (nCD), two complementary outputs (nQ and nQ), and two pins (nREXT/CEXT and nCEXT) for connecting the external timing components CEXTand REXT. Typical pulse width variation over temperature range is ± 0.2 %. The device may be triggered by either the positive or the negative edges of the input pulse. The duration and accuracy of the output pulse are determined by the external timing components CEXTand REXT. The output pulse width (TW) is equal to 0.7 × REXT× CEXT. The linear design techniques guarantee precise control of the output pulse width. A LOW level at nCDterminates the output pulse immediately. Schmitt-trigger action in the trigger inputs makes the circuit highly tolerant to slower rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
| Integrated Circuits (ICs) | 1 | Active | The 74HCT4538-Q100 is a dual retriggerable-resettable monostable multivibrator. Each multivibrator has two trigger/retrigger inputs (nAand nB), a direct reset input (nCD), two complementary outputs (nQ and nQ), and two pins (nREXT/CEXT and nCEXT) for connecting the external timing components CEXTand REXT. Typical pulse width variation over temperature range is ± 0.2 %. The device may be triggered by either the positive or the negative edges of the input pulse. The duration and accuracy of the output pulse are determined by the external timing components CEXTand REXT. The output pulse width (TW) is equal to 0.7 × REXT× CEXT. The linear design techniques guarantee precise control of the output pulse width. A LOW level at nCDterminates the output pulse immediately. Schmitt-trigger action in the trigger inputs makes the circuit highly tolerant to slower rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
| Logic | 1 | Active | The 74HCT4538-Q100 is a dual retriggerable-resettable monostable multivibrator. Each multivibrator has two trigger/retrigger inputs (nAand nB), a direct reset input (nCD), two complementary outputs (nQ and nQ), and two pins (nREXT/CEXT and nCEXT) for connecting the external timing components CEXTand REXT. Typical pulse width variation over temperature range is ± 0.2 %. The device may be triggered by either the positive or the negative edges of the input pulse. The duration and accuracy of the output pulse are determined by the external timing components CEXTand REXT. The output pulse width (TW) is equal to 0.7 × REXT× CEXT. The linear design techniques guarantee precise control of the output pulse width. A LOW level at nCDterminates the output pulse immediately. Schmitt-trigger action in the trigger inputs makes the circuit highly tolerant to slower rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. |
