Nexperia USA Inc.

The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow. The data in the shift register is transferred to the storage register when the STR input is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) is HIGH. A LOW on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

The 74HC42 is a one of ten BCD to decimal decoder. It accepts four BCD inputs (0A to 3A) and provides ten mutually exclusive outputs (0Yto 9Y). The logic design ensures that all outputs are HIGH when binary codes greater than nine are applied to the inputs. The most significant input (3A) produces an useful inhibit function when the device is used as a 1-of-8 decoder. The 3A input can also be used as the data input in an 8-output demultiplexer application. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

The 74HC423 is a dual retriggerable monostable multivibrator with output pulse width control by two methods. The basic pulse time is programmed by selection of an external resistor (REXT) and capacitor (CEXT). Once triggered, the basic output pulse width may be extended by retriggering (nA) or (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ= LOW) can be made as long as desired. When nRD is LOW, it forces the nQ output LOW, the nQoutput HIGH and also inhibits the triggering. Schmitt-trigger action in the nAand nB inputs, makes the circuit highly tolerant to slower input rise and fall times. The '423' is identical to the '123' but cannot be triggered via the reset input. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

The 74HC423-Q100 is a dual retriggerable monostable multivibrator with output pulse width control by two methods. The basic pulse time is programmed by selection of an external resistor (REXT) and capacitor (CEXT). Once triggered, the basic output pulse width may be extended by retriggering (nA) or (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ= LOW) can be made as long as desired. When nRD is LOW, it forces the nQ output LOW, the nQoutput HIGH and also inhibits the triggering. Schmitt-trigger action in the nAand nB inputs, makes the circuit highly tolerant to slower input rise and fall times. The '423' is identical to the '123' but cannot be triggered via the reset input. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

The 74HC4316; 74HCT4316 is a quad single pole, single throw analog switch (SPST). Each switch features two input/output terminals (nY and nZ) and an active HIGH enable input (nS). When nS is LOW, the analog switch is turned off. WhenEis HIGH all four analog switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

The 74HC4351; 74HCT4351 is a single-pole octal-throw analog switch (SP8T) suitable for use in analog or digital 8:1 multiplexer/demultiplexer applications. The switch features three digital select inputs (S0 to S2), eight independent inputs/outputs (Yn), a common input/output (Z) and two digital enable inputs (E1 and E2). WithE1 LOW and E2 HIGH, one of the eight switches is selected (low impedance ON-state) by S0 to S2. The data at the select inputs may be latched by using the latch enable input (LE). WhenLEis HIGH the latch is transparent. WhenE1 is HIGH or E2 is LOW all 8 analog switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

The 74HC4351-Q100; 74HCT4351-Q100 is a single-pole octal-throw analog switch (SP8T) suitable for use in analog or digital 8:1 multiplexer/demultiplexer applications. The switch features three digital select inputs (S0 to S2), eight independent inputs/outputs (Yn), a common input/output (Z) and two digital enable inputs (E1 and E2). WithE1 LOW and E2 HIGH, one of the eight switches is selected (low impedance ON-state) by S0 to S2. The data at the select inputs may be latched by using the latch enable input (LE). WhenLEis HIGH the latch is transparent. WhenE1 is HIGH or E2 is LOW all 8 analog switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

The 74HC4511; 74HCT4511 is a BCD to 7-segment latch/decoder/driver with four address inputs (A, B, C, D), a latch enable input (LE), a ripple blanking input (BI), a lamp test input (LT), and seven segment outputs (a to g). WhenLEis LOW, the state of the segment outputs (a to g) is determined by the data on A to D. WhenLEgoes HIGH, the last data present on A to D are stored in the latches and the segment outputs remain stable. WhenLTis LOW, all the segment outputs are HIGH independent of all other input conditions. WithLTHIGH, a LOW onBIforces all segment outputs LOW. The inputsLTandBIdo not affect the latch circuit. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.