ZL402071:8 LVPECL Buffer with Input Termination | Clock/Timing | 2 | Active | The ZL40207 is an LVPECL clock fan out buffer with eight output clock drivers capable of operating at frequencies up to 750MHz.
The ZL40207 provides an internal input termination network for DC and AC coupled inputs; optional input biasing for AC coupled inputs is also provided. The ZL40207 can accept DC or AC coupled LVPECL and LVDS input signals, AC coupled CML or HCSL input signals, and single ended signals. A pin compatible device with external termination is also available.
The ZL40207 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C. |
ZL402082:6 LVPECL Buffer with Glitch-free Switching | Clock Buffers, Drivers | 2 | Active | The ZL40208 is an LVPECL clock fanout buffer with six output clock drivers capable of operating at frequencies up to 750MHz.
The ZL40208 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C. |
ZL402092:6 LVPECL Buffer with Input Termination | Clock/Timing | 1 | Active | The ZL40209 is an LVPECL clock fan out buffer with two input and six output clock drivers capable of operating at frequencies up to 750MHz.
The ZL40209 provides an internal input termination network for DC and AC coupled inputs; optional input biasing for AC coupled inputs is also provided. The ZL40209 can accept DC or AC coupled LVPECL and LVDS input signals, AC coupled CML or HCSL input signals, and single ended signals. A pin compatible device with external termination is also available.
The ZL40209 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C. |
ZL402102:8 LVPECL Buffer with Glitch-free Switching | Clock/Timing | 1 | Active | The ZL40210 is an LVPECL clock fanout buffer with eight output clock drivers capable of operating at frequencies
up to 750MHz.
The ZL40210 is designed to fan out low-jitter reference clocks for wired or optical communications applications
while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors
minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its
operation is guaranteed over the industrial temperature range -40°C to +85°C. |
ZL402112:8 LVPECL Buffer with Input Termination | Clock/Timing | 1 | Active | The ZL40211 is an LVPECL clock fan out buffer with two input and eight output clock drivers capable of operating at frequencies up to 750MHz.
The ZL40211 provides an internal input termination network for DC and AC coupled inputs; optional input biasing for AC coupled inputs is also provided. The ZL40211 can accept DC or AC coupled LVPECL and LVDS input signals, AC coupled CML or HCSL input signals, and single ended signals. A pin compatible device with external termination is also available.
The ZL40211 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C. |
| Clock/Timing | 1 | Active | The ZL40212 is an LVDS clock fanout buffer with two identical output clock drivers capable of operating at frequencies up to 750MHz.
Inputs to the ZL40212 are externally terminated to allow use of precision termination components and to allow full flexibility of input termination. The ZL40212 can accept DC coupled LVPECL or LVDS and AC coupled LVPECL, LVDS, CML or HCSL input signals; single ended input signals can also be accepted. A pin compatible device with internal termination is also available.
The ZL40212 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C. |
ZL402131:2 LVDS Buffer with Input Termination | Clock Buffers, Drivers | 2 | Active | he ZL40213 is an LVDS clock fanout buffer with two identical output clock drivers capable of operating at frequencies up to 750MHz.
The ZL40213 provides an internal input termination network for DC and AC coupled inputs; optional input biasing for AC coupled inputs is also provided. The ZL40213 can accept DC or AC coupled LVPECL and LVDS input signals, AC coupled CML or HCSL input signals, and single ended signals. A pin compatible device with external termination is also available.
The ZL40213 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C. |
| Integrated Circuits (ICs) | 2 | Active | The ZL40214 is an LVDS clock fanout buffer with four identical output clock drivers capable of operating at frequencies up to 750MHz.
Inputs to the ZL40214 are externally terminated to allow use of precision termination components and to allow full flexibility of input termination. The ZL40214 can accept DC coupled LVPECL or LVDS and AC coupled LVPECL, LVDS, CML or HCSL input signals; single ended input signals can also be accepted. A pin compatible device with internal termination is also available.
The ZL40214 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C. |
| Integrated Circuits (ICs) | 2 | Active | The ZL40216 is an LVDS clock fanout buffer with six identical output clock drivers capable of operating at frequencies up to 750MHz.
Inputs to the ZL40216 are externally terminated to allow use of precision termination components and to allow full flexibility of input termination. The ZL40216 can accept DC coupled LVPECL or LVDS and AC coupled LVPECL, LVDS, CML or HCSL input signals; single ended input signals can also be accepted. A pin compatible device with internal termination is also available.
The ZL40216 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C. |
ZL402171:6 LVDS Buffer with Input Termination | Clock Buffers, Drivers | 1 | Active | The ZL40217 is an LVDS clock fanout buffer with six output clock drivers capable of operating at frequencies up to 750MHz.
The ZL40217 provides an internal input termination network for DC and AC coupled inputs; optional input biasing for AC coupled inputs is also provided. The ZL40217 can accept DC coupled LVPECL or LVDS and AC coupled LVPECL and LVDS input signals, AC coupled CML or HCSL input signals, and single ended signals. A pin compatible device with external termination is also available.
The ZL40217 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C. |
