Analog Devices

The ADN4670 is a low voltage differential signaling (LVDS) clock driver that expands a differential clock input signal to 10 differential clock outputs. The device is programmable using a simple serial interface, so that one of two clock inputs can be selected (CLK0/CLK0or CLK1/CLK1) and any of the differential outputs (Q0/Q0to Q9/Q9) can be enabled or disabled (tristated). The ADN4670 is designed for use in 50 Ω transmission line environments.When the enable input EN is high, the device may be programmed by clocking 11 data bits into the shift register. The first 10 bits determine which outputs are enabled (0 = disabled, 1 = enabled), while the 11th bit selects the clock input (0 = CLK0, 1 = CLK1). A 12th clock pulse transfers data from the shift register to the control register.The ADN4670 is fully specified over the industrial temperature range and is available in a 32-lead LFCSP package.APPLICATIONSClock distribution networks

TheADN4691E/ADN4693E/ ADN4696E /ADN4697Eare multipoint, low voltage differential signaling (M-LVDS) transceivers (driver and receiver pairs) that can operate at up to 200 Mbps (100 MHz). The receivers detect the bus state with a differential input of as little as 50 mV over a common-mode voltage range of −1 V to +3.4 V. ESD protection of up to ±15 kV is implemented on the bus pins. The devices adhere to the TIA/EIA-899 standard for M-LVDS and complement TIA/EIA- 644 LVDS devices with additional multipoint capabilities.The ADN4691E / ADN4693E are Type 1 receivers with 25 mV of hysteresis so that slow-changing signals or loss of input does not lead to output oscillations. The ADN4696E / ADN4697E are Type 2 receivers exhibiting an offset threshold, guaranteeing the output state when the bus is idle (bus-idle fail-safe) or the inputs are open (open-circuit fail-safe).The devices are available as half-duplex in an 8-lead SOIC package (the ADN4691E / ADN4696E) or as full-duplex in a 14-lead SOIC package (the ADN4693E / ADN4697E).APPLICATIONSBackplane and cable multipoint data transmissionMultipoint clock distributionLow power, high speed alternative to shorter RS-485 linksNetworking and wireless base station infrastructure

TheADN4691E/ADN4693E/ADN4696E/ ADN4697E are multipoint, low voltage differential signaling (M-LVDS) transceivers (driver and receiver pairs) that can operate at up to 200 Mbps (100 MHz). The receivers detect the bus state with a differential input of as little as 50 mV over a common-mode voltage range of −1 V to +3.4 V. ESD protection of up to ±15 kV is implemented on the bus pins. The devices adhere to the TIA/EIA-899 standard for M-LVDS and complement TIA/EIA- 644 LVDS devices with additional multipoint capabilities.The ADN4691E / ADN4693E are Type 1 receivers with 25 mV of hysteresis so that slow-changing signals or loss of input does not lead to output oscillations. The ADN4696E / ADN4697E are Type 2 receivers exhibiting an offset threshold, guaranteeing the output state when the bus is idle (bus-idle fail-safe) or the inputs are open (open-circuit fail-safe).The devices are available as half-duplex in an 8-lead SOIC package (the ADN4691E / ADN4696E) or as full-duplex in a 14-lead SOIC package (the ADN4693E / ADN4697E).APPLICATIONSBackplane and cable multipoint data transmissionMultipoint clock distributionLow power, high speed alternative to shorter RS-485 linksNetworking and wireless base station infrastructure

The ADN8102 is a quad bidirectional CX4 cable/backplane equalizer with eight differential PECL-/CML-compatible inputs with programmable equalization and eight differential CML outputs with programmable output levels and pre-emphasis or de-emphasis. The operation of this device is optimized for NRZ data at rates up to 3.75 Gbps.The receive inputs provide programmable equalization to compensate for up to 30 meters of CX4 cable (24 AWG) or 40 inches of FR4, and programmable pre-emphasis to compensate for up to 15 meters of CX4 cable (24 AWG) or 40 inches of FR4 at 3.75 Gbps. Each channel also provides programmable loss-of-signal detection and loopback capability for system testing and debugging.The ADN8102 is controlled through toggle pins, an I2C® control interface that provides more flexible control, or a combination of both. Every channel implements an asynchronous path supporting dc to 3.75 Gbps NRZ data, fully independent of other channels. The ADN8102 has low latency and very low channel-to-channel skew.The main application for the ADN8102 is to support switching in chassis-to-chassis applications over CX4 or InfiniBand® cables.The ADN8102 is packaged in a 9 mm × 9 mm 64-lead LFCSP (QFN) package and operates from −40°C to +85°C.Applications10GBase-CX4HiGig™InfiniBand1×, 2× Fibre ChannelXAUIGigabit Ethernet over backplane or cableCPRI™50 Ω cablesData Sheet, Rev. A, 8/08

The ADN8830 is a monolithic controller that drives a Thermoelectric Cooler (TEC) to stabilize the temperature of a laser diode or a passive component used in telecommunications equipment. Allows maximum TEC voltage programmability and SPICE Model of TEC and ADN8830 is available.

The ADN88311is a monolithic TEC controller. It has two integrated, zero drift, rail-to-rail comparators, and a PWM driver. A unique PWM driver works with an analog driver to control external selected MOSFETs in an H-bridge. By sensing the thermal detector feedback from the TEC, the ADN8831 can drive a TEC to settle the programmable temperature of a laser diode or a passive component attached to the TEC module.The ADN8831 supports NTC thermistors or positive temperature coefficient (PTC) RTDs. The target temperature is set as an analog voltage input either from a DAC or from an external resistor divider driven by a reference voltage source.A proportional integral differential (PID) compensation network helps to quickly and accurately stabilize the ADN8831 thermal control loop. An adjustable PID compensation network example is described in the AN-695 Application Note, Using the ADN8831TEC Controller Evaluation Board. A typical reference voltage of 2.5 V is available from the ADN8831 for thermistor temperature sensing or for TEC voltage/current measuring and limiting in both cooling and heating modes.ApplicationsThermoelectric cooler (TEC) temperature controlDWDM optical transceiver modulesOptical fiber amplifiersOptical networking systemsInstruments requiring TEC temperature control1Product is covered by U.S. Patent No. 6,486,643

The ADN8833 is a monolithic H-bridge TEC driver with integrat-ed 1 A power MOSFETs. It has a linear power stage with the linear driver (LDR) output and a pulse-width modulation (PWM) power stage with the SW output. Depending on the control voltage at the CONT input, the ADN8833 drives current through a TEC to settle the temperature of a laser diode or a passive component attached to the TEC module to the programmed target temperature.The control voltage applied to the CONT input is generated by a digital-to-analog converter (DAC) closing the digital proportional, integral, derivative (PID) loop of temperature control system.The internal 2.5 V reference voltage provides a 1% accurate output that is used to bias a voltage divider network to program the maximum TEC current and voltage limits for both the heating and cooling modes. It can also be a reference voltage for the DAC and the temperature sensing circuit, including a thermistor bridge and an analog-to-digital converter (ADC).APPLICATIONSTEC temperature controlOptical modulesOptical fiber amplifiersOptical networking systemsInstruments requiring TEC temperature control

The ADN88341is a monolithic TEC controller with an integrated TEC controller. It has a linear power stage, a pulse-width modulation (PWM) power stage, and two zero-drift, rail-to-rail operational amplifiers. The linear controller works with the PWM driver to control the internal power MOSFETs in an H-bridge configuration. By measuring the thermal sensor feedback voltage and using the integrated operational amplifiers as a proportional integral differential (PID) compensator to condition the signal, the ADN8834 drives current through a TEC to settle the temperature of a laser diode or a passive component attached to the TEC module to the programmed target temperature.The ADN8834 supports negative temperature coefficient (NTC) thermistors as well as positive temperature coefficient (PTC) resistive temperature detectors (RTD). The target temperature is set as an analog voltage input either from a digital-to-analog converter (DAC) or from an external resistor divider.The temperature control loop of the ADN8834 is stabilized by PID compensation utilizing the built in, zero drift chopper amplifiers. The internal 2.50 V reference voltage provides a 1% accurate output that is used to bias a thermistor temperature sensing bridge as well as a voltage divider network to program the maximum TEC current and voltage limits for both the heating and cooling modes. With the zero drift chopper amplifiers, extremely good long-term temperature stability is maintained via an autonomous analog temperature control loop.APPLICATIONSTEC temperature controlOptical modulesOptical fiber amplifiersOptical networking systemsInstruments requiring TEC temperature control1Product is covered by U.S. Patent No. 6,486,643.