| Integrated Circuits (ICs) | 6 | Active | |
MAX9202Low-Cost, 7ns, Low-Power Voltage Comparators | Comparators | 6 | Active | The MAX9201/MAX9202/MAX9203 high-speed, lowpower, quad/dual/single comparators feature TTL logic outputs with active internal pullups. Fast propagation delay (7ns typ at 5mV overdrive) makes these devices ideal for fast A/D converters and sampling circuits, line receivers, V/F converters, and many other data-discrimination, signal restoration applications.All comparators can be powered from separate analog and digital power supplies or from a single combined supply voltage. The analog input common-mode range includes the negative rail, allowing ground sensing when powered from a single supply. The MAX9201/ MAX9202/MAX9203 consume only 9mW per comparator when powered from a +5V supply.The MAX9202/MAX9203 feature output latches with TTL compatible inputs. The comparator output states are held when the latch inputs are driven low. The MAX9201 provides all the same features as the MAX9202/MAX9203 with the exception of the latches.The MAX9201/MAX9202/MAX9203 are lower power and lower cost upgrades to the MAX901/MAX902/MAX903 offering a 50% power savings and smaller packaging.ApplicationsHigh-Speed A/D ConvertersHigh-Speed Data SamplingHigh-Speed Signal Squaring/RestorationHigh-Speed V/F ConvertersInput Trigger CircuitryLine ReceiversPWM CircuitsThreshold Detectors |
| Integrated Circuits (ICs) | 6 | Active | |
| Integrated Circuits (ICs) | 5 | Active | The MAX9205/MAX9207 serializers transform 10-bit-wide parallel LVCMOS/LVTTL data into a serial high-speed bus low-voltage differential signaling (LVDS) data stream. The serializers typically pair with deserializers like the MAX9206/MAX9208, which receive the serial output and transform it back to 10-bit-wide parallel data.The MAX9205/MAX9207 transmit serial data at speeds up to 400Mbps and 660Mbps, respectively, over PCB traces or twisted-pair cables. Since the clock is recovered from the serial data stream, clock-to-data and data-to-data skew that would be present with a parallel bus are eliminated.The serializers require no external components and few control signals. The input data strobe edge is selected by TCLK_R/F. Active-low PWRDN is used to save power when the devices are not in use. Upon power-up, a synchronization mode is activated, which is controlled by two SYNC inputs, SYNC1 and SYNC2.The MAX9205 can lock to a 16MHz to 40MHz system clock, while the MAX9207 can lock to a 40MHz to 66MHz system clock. The serializer output is held in high impedance until the device is fully locked to the local system clock, or when the device is in power-down mode.Both the devices operate from a single +3.3V supply, are specified for operation from -40°C to +85°C, and are available in 28-pin SSOP packages.ApplicationsAdd/Drop MultiplexersBackplane and Interconnect ApplicationsCell Phone Base StationsDigital Cross-ConnectsDSLAMNetwork Routers and Switches |
| Serializers, Deserializers | 4 | Active | |
MAX920810-Bit Bus LVDS Deserializers | Serializers, Deserializers | 2 | Active | The MAX9206/MAX9208 deserializers transform a highspeed serial bus low-voltage differential signaling (BLVDS) data stream into 10-bit-wide parallel LVCMOS/LVTTL data and clock. The deserializers pair with serializers such as the MAX9205/MAX9207, which generate a serial BLVDS signal from 10-bit-wide parallel data. The serializer/deserializer combination reduces interconnect, simplifies PCB layout, and reduces board size.The MAX9206/MAX9208 receive serial data at 450Mbps and 600Mbps, respectively, over board traces or twisted-pair cables. These devices combine frequency lock, bit lock, and frame lock to produce a parallel-rate clock and word-aligned 10-bit data. Serialization eliminates parallel bus clock-to-data and data-to-data skew.A power-down mode reduces typical supply current to less than 600µA. Upon power-up (applying power or driving active-low PWRDN high), the MAX9206/MAX9208 establish lock after receiving synchronization signals or serial data from the MAX9205/MAX9207. An output enable allows the outputs to be disabled, putting the parallel data outputs and recovered output clock into a highimpedance state without losing lock.The MAX9206/MAX9208 operate from a single +3.3V supply and are specified for operation from -40°C to +85°C. The MAX9206/MAX9208 are available in 28-pin SSOP packages.ApplicationsAdd/Drop MultiplexersBackplane and Interconnect ApplicationsCell Phone Base StationsDigital Cross-ConnectsDSLAMNetwork Routers and Switches |
| Serializers, Deserializers | 3 | Active | |
MAX92127-Bit, 7MHz-to-35MHz DC-Balanced LVDS Deserializer | Serializers, Deserializers | 21 | Active | The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control phase, the input is converted to 9 bits of parallel control data. The separate video and control phases take advantage of video timing to reduce the serial data rate. The MAX9218 pairs with the MAX9217 serializer to form a complete digital video transmission system.Proprietary data decoding reduces EMI and provides DC balance. The DC balance allows AC-coupling, providing isolation between the transmitting and receiving ends of the interface. The MAX9218 features a selectable rising or falling output latch edge.ESD tolerance is specified for ISO 10605 with ±10kV contact discharge and ±30kV air discharge.The MAX9218 operates from a +3.3V core supply and features a separate output supply for interfacing to 1.8V to 3.3V logic-level inputs. This device is available in 48-lead Thin QFN and LQFP packages and is specified from -40°C to +85°C.ApplicationsIn-Vehicle Entertainment SystemsLCD DisplaysNavigation System DisplayVideo Cameras |
| Interface | 1 | Active | |
MAX9213Programmable DC-Balanced 21-Bit Serializers | Serializers, Deserializers | 4 | Active | The MAX9209/MAX9213 serialize 21 bits of LVTTL/LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides timing for deserialization.The MAX9209/MAX9213 feature programmable DC balance, which allows isolation between the serializer and deserializer using AC-coupling. The DC balance circuits on each channel code the data, limiting the imbalance of transmitted ones and zeros to a defined range. The companion MAX9210/MAX9214 deserializers decode the data. When DC balance is not programmed, the serializers are compatible with non-DC-balanced, 21-bit serializers such as the DS90CR215 and DS90CR217.Two frequency ranges and two DC-balance default conditions are available for maximum replacement flexibility and compatibility with existing non-DC-balanced serializers.The MAX9209/MAX9213 are available in TSSOP and space-saving thin QFN packages.ApplicationsAutomotive DVD Entertainment SystemsAutomotive Navigation SystemsDigital CopiersLaser Printers |
