Analog Devices Inc./Maxim Integrated

The LTC6946 is a high performance, low noise, 6.39GHz phase-locked loop (PLL) with a fully integrated VCO, including a reference divider, phase-frequency detector (PFD) with phase-lock indicator, ultralow noise charge pump, integer feedback divider, and VCO output divider. The charge pump contains selectable high and low voltage clamps useful for VCO monitoring.The integrated low noise VCO uses no external components. It is internally calibrated to the correct output frequency with no external system support.The part features a buffered, programmable VCO output divider with a range of 1 through 6, providing a wide frequency range.Frequency Coverage OptionsLTC6946-1LTC6946-2LTC6946-3LTC6946-40 DIV = 12.240 to 3.7403.080 to 4.9103.840 to 5.7904.200 to 6.3900 DIV = 21.120 to 1.8701.540 to 2.4551.920 to 2.8952.100 to 3.1950 DIV = 30.747 to 1.2471.027 to 1.6371.280 to 1.9301.400 to 2.1300 DIV = 40.560 to 0.9350.770 to 1.2280.960 to 1.4481.050 to 1.5980 DIV = 50.448 to 0.7480.616 to 0.9820.768 to 1.1580.840 to 1.2780 DIV = 60.373 to 0.6230.513 to 0.8180.640 to 0.9650.700 to 1.065ApplicationsWireless Base Stations (LTE, WiMAX, W-CDMA, PCS)Broadband Wireless AccessMilitary and Secure RadioTest and Measurement

The LTC694-3.3/LTC695-3.3 provide complete 3.3V power supply monitoring and battery control functions. These include power-on reset, battery back-up, RAM write protection, power failure warning and watchdog timing. The devices are pin compatible upgrades of the LTC694/LTC695 that are optimized for 3.3V systems. Operating power consumption has been reduced to 0.6mW (typical) and 3μW maximum in battery back-up mode. Microprocessor reset and memory write protection are provided when the supply falls below 2.9V. TheRESEToutput is guaranteed to remain logic low with VCCas low as 1V.The LTC694-3.3/LTC695-3.3 power the active RAMs with a charge pumped NMOS power switch to achieve low dropout and low supply current. When primary power is lost, auxiliary power, connected to the battery input pin, powers the RAMs in standby through an efficient PMOS switch.For an early warning of impending power failure, the LTC694-3.3/LTC695-3.3 provide an internal comparator with a user-defined threshold. An internal watchdog timer is also available, which forces the reset pins to active states when the watchdog input is not toggled prior to a preset timeout period.Applications3.3V Low Power SystemsCritical μP Power MonitoringIntelligent InstrumentsBattery-Powered Computers and ControllersAutomotive Systems

The LTC694-3.3/LTC695-3.3 provide complete 3.3V power supply monitoring and battery control functions. These include power-on reset, battery back-up, RAM write protection, power failure warning and watchdog timing. The devices are pin compatible upgrades of the LTC694/LTC695 that are optimized for 3.3V systems. Operating power consumption has been reduced to 0.6mW (typical) and 3μW maximum in battery back-up mode. Microprocessor reset and memory write protection are provided when the supply falls below 2.9V. TheRESEToutput is guaranteed to remain logic low with VCCas low as 1V.The LTC694-3.3/LTC695-3.3 power the active RAMs with a charge pumped NMOS power switch to achieve low dropout and low supply current. When primary power is lost, auxiliary power, connected to the battery input pin, powers the RAMs in standby through an efficient PMOS switch.For an early warning of impending power failure, the LTC694-3.3/LTC695-3.3 provide an internal comparator with a user-defined threshold. An internal watchdog timer is also available, which forces the reset pins to active states when the watchdog input is not toggled prior to a preset timeout period.Applications3.3V Low Power SystemsCritical μP Power MonitoringIntelligent InstrumentsBattery-Powered Computers and ControllersAutomotive Systems

The LTC6952 is a high performance, ultralow jitter, JESD204B/C clock generation and distribution IC. It includes a Phase Locked Loop (PLL) core, consisting of a reference divider, phase-frequency detector (PFD) with a phase-lock indicator, ultralow noise charge pump and integer feedback divider. The LTC6952’s eleven outputs can be configured as up to five JESD204B/C subclass 1 device clock/SYSREF pairs plus one general purpose output, or simply eleven general purpose clock outputs for non-JESD204B/C applications. Each output has its own individually programmable frequency divider and output driver. All outputs can also be synchronized and set to precise phase alignment using individual coarse half-cycle digital delays and fine analog time delays.For applications requiring more than eleven total outputs, multiple LTC6952s can be connected together using the EZSync or ParallelSync synchronization protocols.ApplicationsHigh Performance Data Converter ClockingWireless InfrastructureTest and Measurement

The LTC6953 is a high performance, ultralow jitter, JESD204B/C clock distribution IC. The LTC6953’s eleven outputs can be configured as up to five JESD204B/C subclass 1 device clock/SYSREF pairs plus one general purpose output, or simply eleven general purpose clock outputs for non-JESD204B/C applications. Each output has its own individually programmable frequency divider and output driver. All outputs can also be synchronized and set to precise phase alignment using individual coarse half cycle digital delays and fine analog time delays.For applications requiring more than eleven total outputs, multiple LTC6953s can be connected together with LTC6952s and LTC6955s using the EZSync or ParallelSync synchronization protocols.ApplicationsHigh Performance Data Converter ClockingWireless InfrastructureTest and Measurement