Analog Devices Inc./Maxim Integrated

The LTC4306 is a 4-channel, 2-wire bus multiplexer with bus buffers to provide capacitive isolation between the upstream bus and downstream buses. Through software control, the LTC4306 connects the upstream 2-wire bus to any desired combination of downstream buses. Each channel can be pulled up to a supply voltage ranging from 2.2V to 5.5V, independent of the LTC4306 supply voltage.The downstream channels are also provided withALERT1-ALERT4inputs for fault reporting.Programmable timeout circuitry disconnects the downstream buses if the bus is stuck low. When activated, rise time accelerators source currents into the 2-wire bus pins to reduce rise time. Driving the ENABLE pin low restores all features to their default states. Three address pins provide 27 distinct addresses.The LTC4306 is available in 24-lead QFN (4mm × 5mm) and SSOP packages.ApplicationsNested Addressing5V/3.3V Level TranslatorCapacitance Buffer/Bus Extender

The LTC4307-1 is a 2-wire bus buffer that provides capacitance buffering between input and output. The HDMI specification requires that devices have less than 50pF of input capacitance on their DDC bus lines. The LTC4307-1’s capacitance buffering feature, in conjunction with its sub-10pF data and clock input capacitance, allows HDMI components to easily meet the 50pF requirement and tolerate high capacitance on the internal bus.The LTC4307-1 also provides level-shifting between 3.3V and 5V systems to allow lower voltage HDMI transmitters, receivers and EEPROM to interface to the 5V DDC bus. READY is an open-drain digital output flag that indicates whether or not the input and output busses are connected and can interface to the HDMI hot plug detect (HPD) signal. When driven high, the ENABLE digital input allows the LTC4307-1 to connect after a stop bit or bus idle. Driving ENABLE low breaks the connection between the input and output busses.ApplicationsHDMI3.3V/5V Level TranslationCapacitance Buffer/Bus Extender

The LTC4307-1 is a 2-wire bus buffer that provides capacitance buffering between input and output. The HDMI specification requires that devices have less than 50pF of input capacitance on their DDC bus lines. The LTC4307-1’s capacitance buffering feature, in conjunction with its sub-10pF data and clock input capacitance, allows HDMI components to easily meet the 50pF requirement and tolerate high capacitance on the internal bus.The LTC4307-1 also provides level-shifting between 3.3V and 5V systems to allow lower voltage HDMI transmitters, receivers and EEPROM to interface to the 5V DDC bus. READY is an open-drain digital output flag that indicates whether or not the input and output busses are connected and can interface to the HDMI hot plug detect (HPD) signal. When driven high, the ENABLE digital input allows the LTC4307-1 to connect after a stop bit or bus idle. Driving ENABLE low breaks the connection between the input and output busses.ApplicationsHDMI3.3V/5V Level TranslationCapacitance Buffer/Bus Extender

The LTC4308 hot swappable, 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. The LTC4308 provides bidirectional buffering, keeping the backplane and card capacitances isolated. Negative offset from output to input allows communication between output bus devices with high VOLand devices on the low voltage input side, where bus supplies can be as low as 0.9V. If SDAOUT or SCLOUT are low for 30ms, the LTC4308 will automatically break the Input-Output connection. At this time the LTC4308 automatically generates up to 16 clock pulses on SCLOUT in an attempt to free the bus. A connection will resume if the stuck bus is cleared.During insertion, the SDAOUT and SCLOUT lines are pre-charged to 1V to minimize bus disturbances. When driven high, the ENABLE input allows the LTC4308 to connect after a stop bit or bus idle condition. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY is an open-drain output which indicates that the backplane and card sides are connected.ApplicationsLive Board InsertionServersCapacitance Buffer/Bus ExtenderRAID SystemsATCA

The LTC4309 hot swappable 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. The LTC4309 provides bidirectional buffering, keeping the backplane and card capacitances isolated. Low offset and high VOLtolerance allows cascading of multiple devices on the clock and data busses. If SDAOUT or SCLOUT are low for 30ms,FAULTwill pull low indicating a stuck bus low condition. If DISCEN is tied high, the LTC4309 will automatically break the bus connection and generate up to 16 clock pulses and a stop bit in an attempt to free the bus. A connection will resume if the stuck bus is cleared. If DISCEN is connected to GND, the busses will remain connected with no clock or stop bit generation.ACCinput enables rise-time accelerators for high capacitively loaded busses.During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. When driven high, the ENABLE input allows the LTC4309 to connect after a stop bit or bus idle. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY is an open drain output which indicates that the backplane and card sides are connected.ApplicationsLive Board InsertionServersCapacitance Buffer/Bus ExtenderRAID SystemsATCA

The LTC4312 is a hot-swappable 2-channel 2-wire bus multiplexer that allows one upstream bus to connect to any combination of downstream busses or channels. An individual enable pin controls each connection. The LTC4312 provides bidirectional buffering, keeping the upstream bus capacitance isolated from the downstream bus capacitances. The high noise margin allows the LTC4312 to be interoperable with I2C devices that drive a high VOL(> 0.4V). The LTC4312 supports level translation between 1.5V, 1.8V, 2.5V, 3.3V and 5V busses. The hot-swappable nature of the LTC4312 allows I/O card insertion into, and removal from, a live backplane without corruption of the data and clock busses.If both data and clock are not simultaneously high at least once in 45ms and DISCEN is high, aFAULTsignal is generated indicating a stuck bus low condition, the input is disconnected from each enabled output channel and up to 16 clocks are generated on the enabled downstream busses. A three stateACCpin enables input and output side rise time accelerators of varying strengths and sets the VIL,RISINGvoltage.ApplicationsTelecommunications Systems Including ATCAAddress ExpansionLevel TranslatorCapacitance Buffers/Bus ExtenderLive Board InsertionPMBus