Catalog
LVDS quad CMOS differential line receiver
Key Features
• >155.5 Mbps (77.7 MHz) Switching RatesAccepts Small Swing (350 mV) Differential Signal LevelsHigh Impedance LVDS Inputs with Power DownUltra Low Power Dissipation600 ps Maximum Differential Skew (5V, 25°C)6.0 ns Maximum Propagation DelayIndustrial Operating Temperature RangeAvailable in Surface Mount Packaging (SOIC)Pin Compatible with DS26C32A, MB570 (PECL) and 41LF (PECL)Supports OPEN and Terminated Input FailsafeConforms to ANSI/TIA/EIA-644 LVDS StandardAll trademarks are the property of their respective owners.>155.5 Mbps (77.7 MHz) Switching RatesAccepts Small Swing (350 mV) Differential Signal LevelsHigh Impedance LVDS Inputs with Power DownUltra Low Power Dissipation600 ps Maximum Differential Skew (5V, 25°C)6.0 ns Maximum Propagation DelayIndustrial Operating Temperature RangeAvailable in Surface Mount Packaging (SOIC)Pin Compatible with DS26C32A, MB570 (PECL) and 41LF (PECL)Supports OPEN and Terminated Input FailsafeConforms to ANSI/TIA/EIA-644 LVDS StandardAll trademarks are the property of their respective owners.
Description
AI
The DS90C032B is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device supports data rates in excess of 155.5 Mbps (77.7 MHz) and uses Low Voltage Differential Signaling (LVDS) technology.
The DS90C032B accepts low voltage (350 mV) differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN Failsafe and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.
The DS90C032B provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCCis not present.
The DS90C032B and companion line driver (DS90C031B) provide a new alternative to high power pseudo-ECL devices for high-speed point-to-point interface applications.
The DS90C032B is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device supports data rates in excess of 155.5 Mbps (77.7 MHz) and uses Low Voltage Differential Signaling (LVDS) technology.
The DS90C032B accepts low voltage (350 mV) differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN Failsafe and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.
The DS90C032B provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCCis not present.
The DS90C032B and companion line driver (DS90C031B) provide a new alternative to high power pseudo-ECL devices for high-speed point-to-point interface applications.
