CD4515B Series

CMOS 4-Bit Latch/4-to-16 Line Decoder

Catalog

CMOS 4-Bit Latch/4-to-16 Line Decoder

Part	Voltage Supply Source	Independent Circuits	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Circuit	Operating Temperature [Min]	Operating Temperature [Max]	Voltage - Supply [Max]	Voltage - Supply [Min]	Package / Case [custom]	Package / Case	Package / Case [custom]	Supplier Device Package	Type	Mounting Type	Package / Case	Package / Case
Texas Instruments CD4515BM96	Dual Supply	1	6.8 mA	6.8 mA	1 x 4:16	-55 °C	125 °C	18 V	3 V	7.5 mm	24-SOIC	0.295 in	24-SOIC	Decoder/Demultiplexer	Surface Mount
Texas Instruments CD4515BM	Dual Supply	1	6.8 mA	6.8 mA	1 x 4:16	-55 °C	125 °C	18 V	3 V	7.5 mm	24-SOIC	0.295 in	24-SOIC	Decoder/Demultiplexer	Surface Mount
Texas Instruments CD4515BEG4	Dual Supply	1	6.8 mA	6.8 mA	1 x 4:16	-55 °C	125 °C	18 V	3 V		24-DIP		24-PDIP	Decoder/Demultiplexer	Through Hole	0.6 in	15.24 mm

Catalog

CMOS 4-Bit Latch/4-to-16 Line Decoder

Key Features

• CD4514B Output "High" on SelectCD4515B Output "Low" on SelectStrobed input latchInhibit control100% tested for quiescent current at 20 VMaximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°CNoise margin (over full package temperature range):1 V at VDD= 5 V2 V at VDD= 10 V2.5 V at VDD= 15 V5-V, 10-V, and 15-V parametric ratingsStandardized, symmetrical output characteristicsMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"Applications:Digital multiplexingAddress decodingHexadecimal/BCD decodingProgram-counter decodingControl decoderData sheet acquired from Harris Semiconductor.CD4514B Output "High" on SelectCD4515B Output "Low" on SelectStrobed input latchInhibit control100% tested for quiescent current at 20 VMaximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°CNoise margin (over full package temperature range):1 V at VDD= 5 V2 V at VDD= 10 V2.5 V at VDD= 15 V5-V, 10-V, and 15-V parametric ratingsStandardized, symmetrical output characteristicsMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"Applications:Digital multiplexingAddress decodingHexadecimal/BCD decodingProgram-counter decodingControl decoderData sheet acquired from Harris Semiconductor.

Description

CD4514B and CD4515B consist of a 4-bit strobed latch and a 4-to-16-line decoder. The latches hold the last input data presented prior to the strobe transition from 1 to 0. Inhibit control allows all outputs to be placed at 0 (CD4514B) or 1 (CD4515B) regardless of the state of the data or strobe inputs. The decode truth table indicates all combinations of data inputs and appropriate selected outputs. These devices are similar to industry types MC14514 and MC14515. The CD4514B and CD4515B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), and 16-lead small-outline packages (M and M96 suffixes). CD4514B and CD4515B consist of a 4-bit strobed latch and a 4-to-16-line decoder. The latches hold the last input data presented prior to the strobe transition from 1 to 0. Inhibit control allows all outputs to be placed at 0 (CD4514B) or 1 (CD4515B) regardless of the state of the data or strobe inputs. The decode truth table indicates all combinations of data inputs and appropriate selected outputs. These devices are similar to industry types MC14514 and MC14515. The CD4514B and CD4515B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), and 16-lead small-outline packages (M and M96 suffixes).