SN74LVT125-Q1 Series

Automotive 4-ch, 2.7-V to 3.6-V buffers with bus-hold, TTL-compatible CMOS inputs and 3-state output

Catalog

Automotive 4-ch, 2.7-V to 3.6-V buffers with bus-hold, TTL-compatible CMOS inputs and 3-state output

Part	Supplier Device Package	Logic Type	Number of Elements	Output Type	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Mounting Type	Package / Case [custom]	Package / Case [custom]	Package / Case	Number of Bits per Element	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case	Package / Case	Qualification	Current - Output High, Low [y]	Current - Output High, Low [x]	Grade	Package / Case [x]	Package / Case [y]
Texas Instruments SN74LVT125PWRG4	14-TSSOP	Buffer Non-Inverting	4	3-State	85 °C	-40 °C	64 mA	32 mA	Surface Mount	0.173 "	4.4 mm	14-TSSOP	1	2.7 V	3.6 V
Texas Instruments SN74LVT125PWG4	14-TSSOP	Buffer Non-Inverting	4	3-State	85 °C	-40 °C	64 mA	32 mA	Surface Mount	0.173 "	4.4 mm	14-TSSOP	1	2.7 V	3.6 V
Texas Instruments SN74LVT125DBR	14-SSOP	Buffer Non-Inverting	4	3-State	85 °C	-40 °C	64 mA	32 mA	Surface Mount			14-SSOP	1	2.7 V	3.6 V	5.3 mm	0.209 "
Texas Instruments SN74LVT125QPWRG4Q1	14-TSSOP	Buffer Non-Inverting	4	3-State	125 °C	-40 °C			Surface Mount	0.173 "	4.4 mm	14-TSSOP	1	2.7 V	3.6 V			AEC-Q100	32 mA	32 mA	Automotive
Texas Instruments SN74LVT125QDRQ1		Buffer Non-Inverting	4	3-State	125 °C	-40 °C			Surface Mount			14-SOIC	1	2.7 V	3.6 V			AEC-Q100	32 mA	32 mA	Automotive	0.154 in	3.9 mm
Texas Instruments SN74LVT125DR		Buffer Non-Inverting	4	3-State	85 °C	-40 °C	64 mA	32 mA	Surface Mount			14-SOIC	1	2.7 V	3.6 V							0.154 in	3.9 mm
Texas Instruments SN74LVT125DG4		Buffer Non-Inverting	4	3-State	85 °C	-40 °C	64 mA	32 mA	Surface Mount			14-SOIC	1	2.7 V	3.6 V							0.154 in	3.9 mm
Texas Instruments SN74LVT125D		Buffer Non-Inverting	4	3-State	85 °C	-40 °C	64 mA	32 mA	Surface Mount			14-SOIC	1	2.7 V	3.6 V							0.154 in	3.9 mm
Texas Instruments SN74LVT125PW	14-TSSOP	Buffer Non-Inverting	4	3-State	85 °C	-40 °C	64 mA	32 mA	Surface Mount	0.173 "	4.4 mm	14-TSSOP	1	2.7 V	3.6 V
Texas Instruments SN74LVT125QDRG4Q1		Buffer Non-Inverting	4	3-State	125 °C	-40 °C			Surface Mount			14-SOIC	1	2.7 V	3.6 V			AEC-Q100	32 mA	32 mA	Automotive	0.154 in	3.9 mm

Catalog

Automotive 4-ch, 2.7-V to 3.6-V buffers with bus-hold, TTL-compatible CMOS inputs and 3-state output

Key Features

• Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Supports Unregulated Battery Operation Down to 2.7 VTypical VOLP(Output Ground Bounce)<0.8 V at VCC= 3.3 V, TA= 25°CIoffSupports Partial-Power-Down Mode OperationBus-Hold Data Inputs Eliminate the Need for External Pullup ResistorsLatch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Supports Unregulated Battery Operation Down to 2.7 VTypical VOLP(Output Ground Bounce)<0.8 V at VCC= 3.3 V, TA= 25°CIoffSupports Partial-Power-Down Mode OperationBus-Hold Data Inputs Eliminate the Need for External Pullup ResistorsLatch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)

Description

This bus buffer is designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. The SN74LVT125 features independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE)\ input is high. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This bus buffer is designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. The SN74LVT125 features independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE)\ input is high. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.