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SN74ABT126

SN74ABT126 Series

4-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Manufacturer: Texas Instruments

Catalog

4-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Key Features

Typical VOLP(Output Ground Bounce)<1 V at VCC= 5 V, TA= 25°CHigh-Impedance State During Power Up and Power DownHigh-Drive Outputs (–32-mA IOH, 64-mA IOL)Ioffand Power-Up 3-State Support Hot InsertionLatch-Up Performance Exceeds 500 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Typical VOLP(Output Ground Bounce)<1 V at VCC= 5 V, TA= 25°CHigh-Impedance State During Power Up and Power DownHigh-Drive Outputs (–32-mA IOH, 64-mA IOL)Ioffand Power-Up 3-State Support Hot InsertionLatch-Up Performance Exceeds 500 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)

Description

AI
The ’ABT126 bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When VCCis between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. The ’ABT126 bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When VCCis between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.