SN74LVC16T245-EP Series

16-bit dual-supply bus transceiver with configurable level-shifting / voltage translation

Catalog

16-bit dual-supply bus transceiver with configurable level-shifting / voltage translation

Part	Package / Case	Package / Case	Package / Case [custom]	Logic Type	Output Type	Operating Temperature [Max]	Operating Temperature [Min]	Number of Elements	Number of Bits per Element	Current - Output High, Low [y]	Current - Output High, Low [x]	Mounting Type	Supplier Device Package	Voltage - Supply [Max]	Voltage - Supply [Min]	Package / Case [y]	Package / Case [y]
Texas Instruments CLVC16T245MDGGREP	48-TFSOP	0.24 in	6.1 mm	Translation Transceiver	3-State	85 °C	-40 °C	2	8	32 mA	32 mA	Surface Mount	48-TSSOP	5.5 V	1.65 V
Texas Instruments SN74LVC16T245DGGR	48-TFSOP	0.24 in	6.1 mm	Translation Transceiver	3-State	85 °C	-40 °C	2	8	32 mA	32 mA	Surface Mount	48-TSSOP	5.5 V	1.65 V
Texas Instruments CLVC16T245MDGGEP	48-TFSOP	0.24 in	6.1 mm	Translation Transceiver	3-State	85 °C	-40 °C	2	8	32 mA	32 mA	Surface Mount	48-TSSOP	5.5 V	1.65 V
Texas Instruments SN74LVC16T245GQLR	56-VFBGA			Translation Transceiver	3-State	85 °C	-40 °C	2	8	32 mA	32 mA	Surface Mount	56-BGA Microstar Junior (7x4.5)	5.5 V	1.65 V
Texas Instruments 74LVC16T245DGGRG4	48-TFSOP	0.24 in	6.1 mm	Translation Transceiver	3-State	85 °C	-40 °C	2	8	32 mA	32 mA	Surface Mount	48-TSSOP	5.5 V	1.65 V
Texas Instruments SN74LVC16T245DLR	48-BSSOP			Translation Transceiver	3-State	85 °C	-40 °C	2	8	32 mA	32 mA	Surface Mount	48-SSOP	5.5 V	1.65 V	0.295 in	7.5 mm
Texas Instruments SN74LVC16T245ZQLR	56-VFBGA			Translation Transceiver	3-State	85 °C	-40 °C	2	8	32 mA	32 mA	Surface Mount	56-BGA Microstar Junior (7x4.5)	5.5 V	1.65 V
Texas Instruments 74LVC16T245DGGRE4	48-TFSOP	0.24 in	6.1 mm	Translation Transceiver	3-State	85 °C	-40 °C	2	8	32 mA	32 mA	Surface Mount	48-TSSOP	5.5 V	1.65 V

Catalog

16-bit dual-supply bus transceiver with configurable level-shifting / voltage translation

Key Features

• Control Inputs VIHand VILLevels AreReferenced to VCCAVoltageVCCIsolation Feature – If Either VCCInput Is at GND, Both Ports Are in the High-Impedance StateOvervoltage-Tolerant Inputs and Outputs Allow Mixed-Voltage-Mode DataCommunicationsFully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full1.65-V to 5.5-V Power-Supply RangeIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Control Inputs VIHand VILLevels AreReferenced to VCCAVoltageVCCIsolation Feature – If Either VCCInput Is at GND, Both Ports Are in the High-Impedance StateOvervoltage-Tolerant Inputs and Outputs Allow Mixed-Voltage-Mode DataCommunicationsFully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full1.65-V to 5.5-V Power-Supply RangeIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)

Description

This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCAaccepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCBaccepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. The SN74LVC16T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICCand ICCZ. The SN74LVC16T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCCisolation feature ensures that if either VCCinput is at GND, then both ports are in the high-impedance state. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCAaccepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCBaccepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. The SN74LVC16T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICCand ICCZ. The SN74LVC16T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCCisolation feature ensures that if either VCCinput is at GND, then both ports are in the high-impedance state. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.