
LMK03328 Series
Ultra-low jitter clock generator family with two independent PLLs
Manufacturer: Texas Instruments
Catalog
Ultra-low jitter clock generator family with two independent PLLs
Key Features
• Ultra-low noise, high performanceJitter: 100fs RMS typical, FOUT > 100MHzPSNR: –80dBc, robust supply noise immunityFlexible device optionsUp to 8 AC-LVPECL, AC-LVDS, AC-CML, HCSL or LVCMOS outputs, or any combinationPin mode, I2C mode, and EEPROM mode71-pin selectable pre-programmed default start-up optionsDual inputs with automatic or manual selectionCrystal input: 10MHz to 52MHzExternal input: 1MHz to 300MHzFrequency margining optionsFine frequency margining (±50ppm typical) using low-cost pullable crystal referenceGlitchless coarse frequency margining (%) using output dividersOther featuresSupply: 3.3V core, 1.8V, 2.5V, 3.3V outputIndustrial temperature range (–40°C to 85°C)Package: 7mm × 7mm 48-WQFNUltra-low noise, high performanceJitter: 100fs RMS typical, FOUT > 100MHzPSNR: –80dBc, robust supply noise immunityFlexible device optionsUp to 8 AC-LVPECL, AC-LVDS, AC-CML, HCSL or LVCMOS outputs, or any combinationPin mode, I2C mode, and EEPROM mode71-pin selectable pre-programmed default start-up optionsDual inputs with automatic or manual selectionCrystal input: 10MHz to 52MHzExternal input: 1MHz to 300MHzFrequency margining optionsFine frequency margining (±50ppm typical) using low-cost pullable crystal referenceGlitchless coarse frequency margining (%) using output dividersOther featuresSupply: 3.3V core, 1.8V, 2.5V, 3.3V outputIndustrial temperature range (–40°C to 85°C)Package: 7mm × 7mm 48-WQFN
Description
AI
The LMK03328 device is an ultra-low-noise clock generator that has two fractional-N frequency synthesizers with integrated VCOs, flexible clock distribution and fan-out, and pin-selectable configuration states stored in an on-chip EEPROM. The device can generate multiple clocks for various multi-gigabit serial interfaces and digital devices, which can reduce the BOM cost and board area, and can improve reliability by replacing multiple oscillators and clock distribution devices. The ultra-low-jitter reduces bit error rate (BER) in high-speed serial links.
The LMK03328 device is an ultra-low-noise clock generator that has two fractional-N frequency synthesizers with integrated VCOs, flexible clock distribution and fan-out, and pin-selectable configuration states stored in an on-chip EEPROM. The device can generate multiple clocks for various multi-gigabit serial interfaces and digital devices, which can reduce the BOM cost and board area, and can improve reliability by replacing multiple oscillators and clock distribution devices. The ultra-low-jitter reduces bit error rate (BER) in high-speed serial links.