DLPC6401 Series
DLP® display controller for high-brightness portable displays
Manufacturer: Texas Instruments
Catalog
DLP® display controller for high-brightness portable displays
Key Features
• Provides a 30-Bit Input Pixel Interface:YUV, YCrCb, or RGB Data Format8, 9, or 10 Bits per ColorPixel Clock Support up to 150 MHzProvides a Single Channel, LVDS Based,Flat-Panel Display (FPD)-Link Compatible Input Interface:Supports Sources up to a 90-MHz Effective Pixel Clock RateFour Demodulated Pixel-Mapped Modes Supported for 8, 9, 10 YUV, YCrCb, or RGB Formatted InputsSupports 45- to 120-Hz Frame RatesFull Support for Diamond 0.45 WXGAHigh-Speed, Double Data Rate (DDR) Digital Micromirror Device (DMD) Interface149.33-MHz ARM926™ MicroprocessorMicroprocessor Peripherals:Programmable Pulse-Width Modulation (PWM) and Capture TimersTwo I2C PortsTwo UART Ports (for Debug Only)32 KB of Internal RAMDedicated LED PWM GeneratorsImage Processing:Auto-Lock for Standard, Wide, and Black Border1D Keystone CorrectionProgrammable DegammaOn-Screen Display (OSD)Splash Screen Display SupportIntegrated Clock Generation CircuitryOperates on a Single 32-MHz CrystalIntegrated Spread Spectrum ClockingIntegrated 64-Mb Frame Memory Eliminates the Need for External High-Speed MemoryExternal Memory Support: Parallel Flash for Microprocessor and PWM SequenceSystem Control:DMD Power and Reset Driver ControlDMD Horizontal and Vertical Image FlipJTAG Boundary Scan Test Support419-Pin Plastic Ball Grid Array PackageProvides a 30-Bit Input Pixel Interface:YUV, YCrCb, or RGB Data Format8, 9, or 10 Bits per ColorPixel Clock Support up to 150 MHzProvides a Single Channel, LVDS Based,Flat-Panel Display (FPD)-Link Compatible Input Interface:Supports Sources up to a 90-MHz Effective Pixel Clock RateFour Demodulated Pixel-Mapped Modes Supported for 8, 9, 10 YUV, YCrCb, or RGB Formatted InputsSupports 45- to 120-Hz Frame RatesFull Support for Diamond 0.45 WXGAHigh-Speed, Double Data Rate (DDR) Digital Micromirror Device (DMD) Interface149.33-MHz ARM926™ MicroprocessorMicroprocessor Peripherals:Programmable Pulse-Width Modulation (PWM) and Capture TimersTwo I2C PortsTwo UART Ports (for Debug Only)32 KB of Internal RAMDedicated LED PWM GeneratorsImage Processing:Auto-Lock for Standard, Wide, and Black Border1D Keystone CorrectionProgrammable DegammaOn-Screen Display (OSD)Splash Screen Display SupportIntegrated Clock Generation CircuitryOperates on a Single 32-MHz CrystalIntegrated Spread Spectrum ClockingIntegrated 64-Mb Frame Memory Eliminates the Need for External High-Speed MemoryExternal Memory Support: Parallel Flash for Microprocessor and PWM SequenceSystem Control:DMD Power and Reset Driver ControlDMD Horizontal and Vertical Image FlipJTAG Boundary Scan Test Support419-Pin Plastic Ball Grid Array Package
Description
AI
The DLPC6401 digital controller, part of the DLP4500 (.45 WXGA) chipset, supports reliable operation of the DLP4500 digital micromirror device (DMD). The DLPC6401 controller provides a convenient, multi-functional interface between system electronics and the DMD, enabling small form factor and high resolution HD displays.
The DLPC6401 digital controller, part of the DLP4500 (.45 WXGA) chipset, supports reliable operation of the DLP4500 digital micromirror device (DMD). The DLPC6401 controller provides a convenient, multi-functional interface between system electronics and the DMD, enabling small form factor and high resolution HD displays.
