Catalog
16-Bit Bus Transceiver With 3-State Outputs
Key Features
• Member of the Texas Instruments Widebus™ FamilyOperates From 2.7 V to 3.6 VInputs Accept Voltages to 5.5 VMax tpdof 8.5 ns at 3.3 VTypical VOLP(Output Ground Bounce)<0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot)>2 V at VCC= 3.3 V, TA= 25°CBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsAll Outputs Have Equivalent 26-Series Resistors, So No External Resistors Are RequiredLatch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Widebus is a trademark of Texas Instruments.Member of the Texas Instruments Widebus™ FamilyOperates From 2.7 V to 3.6 VInputs Accept Voltages to 5.5 VMax tpdof 8.5 ns at 3.3 VTypical VOLP(Output Ground Bounce)<0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot)>2 V at VCC= 3.3 V, TA= 25°CBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsAll Outputs Have Equivalent 26-Series Resistors, So No External Resistors Are RequiredLatch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Widebus is a trademark of Texas Instruments.
Description
AI
This 16-bit (dual-octal) noninverting bus transceiver is designed for 2.7-V to 3.6-V VCCoperation.
The SN74LVCR162245 is designed forasynchronous communication between data buses. The control-function implementation minimizes external timing requirements.
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so that the buses are effectively isolated.
All outputs, which are designed to sink up to 12 mA, include 26-resistors to reduce overshoot and undershoot.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input circuit and is not disabled by OE\ or DIR.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This 16-bit (dual-octal) noninverting bus transceiver is designed for 2.7-V to 3.6-V VCCoperation.
The SN74LVCR162245 is designed forasynchronous communication between data buses. The control-function implementation minimizes external timing requirements.
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so that the buses are effectively isolated.
All outputs, which are designed to sink up to 12 mA, include 26-resistors to reduce overshoot and undershoot.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input circuit and is not disabled by OE\ or DIR.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
