
AFE7903 Series
2-transmit, 2-receive RF-sampling transceiver, 5-MHz to 7.4-GHz, max 400-MHz IBW
Manufacturer: Texas Instruments
Catalog
2-transmit, 2-receive RF-sampling transceiver, 5-MHz to 7.4-GHz, max 400-MHz IBW
Key Features
• Request full data sheetDual RF sampling 12 GSPS transmit DACsDual RF sampling 3 GSPS receive ADCsMaximum signal bandwidth per TX or RX: 400 MHzRF frequency range: 5 MHz - 7.4 GHzDigital step attenuators (DSA):TX: 40 dB range, 0.125 dB stepsRX: 25 dB range, 0.5 dB stepsSingle or dual-band DUC/DDCs for TX and RX16x NCOs per TX/RXOptional Internal PLL/VCO for DAC/ADC clocks or external clock at DAC or ADC sample rateSysref Alignment DetectorSerDes data interface:JESD204B and JESD204C compatible8 SerDes transceivers up to 29.5 GbpsSubclass 1 multi-device synchronizationPackage: 17 mm × 17 mm FCBGA, 0.8-mm pitchRequest full data sheetDual RF sampling 12 GSPS transmit DACsDual RF sampling 3 GSPS receive ADCsMaximum signal bandwidth per TX or RX: 400 MHzRF frequency range: 5 MHz - 7.4 GHzDigital step attenuators (DSA):TX: 40 dB range, 0.125 dB stepsRX: 25 dB range, 0.5 dB stepsSingle or dual-band DUC/DDCs for TX and RX16x NCOs per TX/RXOptional Internal PLL/VCO for DAC/ADC clocks or external clock at DAC or ADC sample rateSysref Alignment DetectorSerDes data interface:JESD204B and JESD204C compatible8 SerDes transceivers up to 29.5 GbpsSubclass 1 multi-device synchronizationPackage: 17 mm × 17 mm FCBGA, 0.8-mm pitch
Description
AI
The AFE7903 is a high performance, wide bandwidth multi-channel transceiver, integrating two RF sampling transmitter chains and two RF sampling receiver chains. With operation up to 7.4 GHz, this device enables direct RF sampling in the HF, VHF, UHF, L, S and C-band frequency ranges without the need for additional frequency conversions stages. This improvement in density and flexibility enables high-channel-count, multi-mission systems.
The TX signal paths support interpolation and digital up conversion options that deliver up to 400 MHz of signal bandwidth. The output of the DUCs drives a 12 GSPS DAC (digital to analog converter) with a mixed mode output option to enhance 2nd Nyquist operation. The DAC output includes a variable gain amplifier (TX DSA) with 40 dB range and 1 dB analog and 0.125 dB digital steps.
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Each receiver chain includes a 25 dB range DSA (Digital Step Attenuator), followed by a 3 GSPS ADC (analog-to-digital converter). Each receiver channel has an analog peak power detector and various digital power detectors to assist an external or internal autonomous automatic gain controller, and RF overload detectors for device reliability protection. Flexible decimation options provide optimization of data bandwidth up to 400 MHz for two RX.
The device contains a SYSREF timing detector to allow optimization of the SYSREF input timing relative to the device clock.
The AFE7903 is a high performance, wide bandwidth multi-channel transceiver, integrating two RF sampling transmitter chains and two RF sampling receiver chains. With operation up to 7.4 GHz, this device enables direct RF sampling in the HF, VHF, UHF, L, S and C-band frequency ranges without the need for additional frequency conversions stages. This improvement in density and flexibility enables high-channel-count, multi-mission systems.
The TX signal paths support interpolation and digital up conversion options that deliver up to 400 MHz of signal bandwidth. The output of the DUCs drives a 12 GSPS DAC (digital to analog converter) with a mixed mode output option to enhance 2nd Nyquist operation. The DAC output includes a variable gain amplifier (TX DSA) with 40 dB range and 1 dB analog and 0.125 dB digital steps.
space
Each receiver chain includes a 25 dB range DSA (Digital Step Attenuator), followed by a 3 GSPS ADC (analog-to-digital converter). Each receiver channel has an analog peak power detector and various digital power detectors to assist an external or internal autonomous automatic gain controller, and RF overload detectors for device reliability protection. Flexible decimation options provide optimization of data bandwidth up to 400 MHz for two RX.
The device contains a SYSREF timing detector to allow optimization of the SYSREF input timing relative to the device clock.