Catalog
4K DSI to FPD-Link IV bridge serializer
Key Features
• Single or dual port MIPI DSI receiverCompliant to D-PHY v1.2 and DSI v1.3.1Packed 16/18/24/30-bit RGB and 16-bit YCbCrLoosely packed 18-bit RGB and 20-bit 4:2:21 clock lane and 1-4 configurable data lanes per D-PHY PortUp to 2.5 Gbps/lane with skew calibrationSupports data lane swap and polarity inversionSupports both burst and non-burst modeSuperFrame Unpacking CapabilitySuitable for 4K at 60Hz video resolutionFPD-Link IV interfaceSupports 10.8/6.75/3.375Gbps per channel; Up to 21.6Gbps over dual channelsCoax/STP interconnect supportPort Splitting to enable Y-cable interfacesUltra-low latency control channelTwo I2C up to 1MHz (up to 3.4MHz for local bus access)High speed GPIOsBackwards compatible720P 92x and 1080P/2K 94x product familiesADAS 936, 954, 960, 962, 9702, 9722 deserializersSecurity and diagnosticsVoltage and temperature monitoringLine Fault DetectionBIST and pattern generationCRC and error diagnosticsUnique ID for counterfeit protectionECC on control bitsAdvanced link robustness and EMC controlData scramblingSpread spectrum clocking generation (SSCG)Low power operation1.8V and 1.1V dual power supplyAEC-Q100 qualified for automotive applicationsAEC-Q100 grade-level 2: −40℃ to +105℃64 pin QFN Wettable flanks 9mm x 9mmISO 10605 and IEC 61000-4-2 ESD compliantSingle or dual port MIPI DSI receiverCompliant to D-PHY v1.2 and DSI v1.3.1Packed 16/18/24/30-bit RGB and 16-bit YCbCrLoosely packed 18-bit RGB and 20-bit 4:2:21 clock lane and 1-4 configurable data lanes per D-PHY PortUp to 2.5 Gbps/lane with skew calibrationSupports data lane swap and polarity inversionSupports both burst and non-burst modeSuperFrame Unpacking CapabilitySuitable for 4K at 60Hz video resolutionFPD-Link IV interfaceSupports 10.8/6.75/3.375Gbps per channel; Up to 21.6Gbps over dual channelsCoax/STP interconnect supportPort Splitting to enable Y-cable interfacesUltra-low latency control channelTwo I2C up to 1MHz (up to 3.4MHz for local bus access)High speed GPIOsBackwards compatible720P 92x and 1080P/2K 94x product familiesADAS 936, 954, 960, 962, 9702, 9722 deserializersSecurity and diagnosticsVoltage and temperature monitoringLine Fault DetectionBIST and pattern generationCRC and error diagnosticsUnique ID for counterfeit protectionECC on control bitsAdvanced link robustness and EMC controlData scramblingSpread spectrum clocking generation (SSCG)Low power operation1.8V and 1.1V dual power supplyAEC-Q100 qualified for automotive applicationsAEC-Q100 grade-level 2: −40℃ to +105℃64 pin QFN Wettable flanks 9mm x 9mmISO 10605 and IEC 61000-4-2 ESD compliant
Description
AI
DS90UB981-Q1 is a MIPI DSI to FPD-Link III/IV bridge device. In conjunction with an FPD-Link IV deserializer, the chipset provides a high-speed serialized interface over low-cost 50Ω coax or STP cables. The DS90UB981-Q1 is a D-PHY v1.2 compliant device that serializes a MIPI DSI input supporting video resolutions including 4K with 30-bit color depth. The FPD-Link IV interface supports video and audio data transmission and full duplex control, including I2C and GPIO data over a single channel or dual channels. Consolidation of video data and control over two FPD-Link IV lanes reduces the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, SSCG, and randomization. In backward compatible mode, the devices supports up to 720p and 1080p resolutions with 24-bit color depth over a single/dual link. In ADAS compatible mode, the device is interoperable with 936, 95x, 96x & 97x deserializers supporting resolutions up to 8MP+/40fps.
DS90UB981-Q1 is a MIPI DSI to FPD-Link III/IV bridge device. In conjunction with an FPD-Link IV deserializer, the chipset provides a high-speed serialized interface over low-cost 50Ω coax or STP cables. The DS90UB981-Q1 is a D-PHY v1.2 compliant device that serializes a MIPI DSI input supporting video resolutions including 4K with 30-bit color depth. The FPD-Link IV interface supports video and audio data transmission and full duplex control, including I2C and GPIO data over a single channel or dual channels. Consolidation of video data and control over two FPD-Link IV lanes reduces the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, SSCG, and randomization. In backward compatible mode, the devices supports up to 720p and 1080p resolutions with 24-bit color depth over a single/dual link. In ADAS compatible mode, the device is interoperable with 936, 95x, 96x & 97x deserializers supporting resolutions up to 8MP+/40fps.