SN74ALVCH162827 Series

20-ch, 1.65-V to 3.6-V buffers with bus-hold and 3-state outputs

Catalog

20-ch, 1.65-V to 3.6-V buffers with bus-hold and 3-state outputs

Part	Mounting Type	Operating Temperature [Max]	Operating Temperature [Min]	Logic Type	Number of Elements	Number of Bits per Element	Package / Case	Package / Case	Package / Case	Output Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Supplier Device Package
Texas Instruments SN74ALVCH162827GR	Surface Mount	85 °C	-40 °C	Buffer Non-Inverting	2	10	6.1 mm	0.24 in	56-TFSOP	3-State	1.65 V	3.6 V	12 mA	12 mA	56-TSSOP
Texas Instruments SN74ALVCH162827DGG
Texas Instruments SN74ALVCH162827DLR	Surface Mount	85 °C	-40 °C	Buffer Non-Inverting	2	10	7.5 mm	0.295 in	56-BSSOP	3-State	1.65 V	3.6 V	12 mA	12 mA	56-SSOP
Texas Instruments SN74ALVCH162827DGGR

Catalog

20-ch, 1.65-V to 3.6-V buffers with bus-hold and 3-state outputs

Key Features

• Member of the Texas Instruments Widebus™ FamilyOutput Ports Have Equivalent 26-Series Resistors, So No External Resistors Are RequiredBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Widebus is a trademark of Texas Instruments Incorporated.Member of the Texas Instruments Widebus™ FamilyOutput Ports Have Equivalent 26-Series Resistors, So No External Resistors Are RequiredBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Widebus is a trademark of Texas Instruments Incorporated.

Description

This 20-bit noninverting buffer/driver is designed for 1.65-V to 3.6-V VCCoperation. The SN74ALVCH162827 is composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1\ and 1OE2\ or 2OE1\ and 2OE2\) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state. The outputs, which are designed to sink up to 12 mA, include equivalent 26-resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. This 20-bit noninverting buffer/driver is designed for 1.65-V to 3.6-V VCCoperation. The SN74ALVCH162827 is composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1\ and 1OE2\ or 2OE1\ and 2OE2\) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state. The outputs, which are designed to sink up to 12 mA, include equivalent 26-resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.