SN74LVTH126 Series

4-ch, 2.7-V to 3.6-V buffers with bus-hold, TTL-compatible CMOS inputs and 3-state outputs

Catalog

4-ch, 2.7-V to 3.6-V buffers with bus-hold, TTL-compatible CMOS inputs and 3-state outputs

Part	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Mounting Type	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case [x]	Package / Case [y]	Package / Case	Logic Type	Number of Bits per Element	Output Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Number of Elements	Package / Case [custom]	Package / Case [custom]	Supplier Device Package
Texas Instruments SN74LVTH126DR	64 mA	32 mA	Surface Mount	85 °C	-40 °C	0.154 in	3.9 mm	14-SOIC	Buffer Non-Inverting	1	3-State	2.7 V	3.6 V	4
Texas Instruments SN74LVTH126DGVR	64 mA	32 mA	Surface Mount	85 °C	-40 °C	0.173 in 4.4 mm		14-TFSOP	Buffer Non-Inverting	1	3-State	2.7 V	3.6 V	4
Texas Instruments SN74LVTH126PWR	64 mA	32 mA	Surface Mount	85 °C	-40 °C			14-TSSOP	Buffer Non-Inverting	1	3-State	2.7 V	3.6 V	4	0.173 "	4.4 mm	14-TSSOP
Texas Instruments SN74LVTH126D	64 mA	32 mA	Surface Mount	85 °C	-40 °C	0.154 in	3.9 mm	14-SOIC	Buffer Non-Inverting	1	3-State	2.7 V	3.6 V	4
Texas Instruments SN74LVTH126NS	64 mA	32 mA	Surface Mount	85 °C	-40 °C	0.209 "	5.3 mm	14-SOIC	Buffer Non-Inverting	1	3-State	2.7 V	3.6 V	4			14-SO
Texas Instruments SN74LVTH126NSR	64 mA	32 mA	Surface Mount	85 °C	-40 °C	0.209 "	5.3 mm	14-SOIC	Buffer Non-Inverting	1	3-State	2.7 V	3.6 V	4			14-SO

Catalog

4-ch, 2.7-V to 3.6-V buffers with bus-hold, TTL-compatible CMOS inputs and 3-state outputs

Key Features

• Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Support Unregulated Battery Operation Down to 2.7 VTypical VOLP(Output Ground Bounce)<0.8 V at VCC= 3.3 V, TA= 25°CIoffand Power-Up 3-State Support Hot InsertionBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Support Unregulated Battery Operation Down to 2.7 VTypical VOLP(Output Ground Bounce)<0.8 V at VCC= 3.3 V, TA= 25°CIoffand Power-Up 3-State Support Hot InsertionBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)

Description

These bus buffers are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. The ’LVTH126 devices feature independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE) input is low. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. When VCCis between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. These devices are fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. These bus buffers are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. The ’LVTH126 devices feature independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE) input is low. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. When VCCis between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. These devices are fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.