Zenode.ai Logo
Beta
SN74ALVTH162827

SN74ALVTH162827 Series

20-ch, 2.3-V to 3.6-V buffers with bus-hold, TTL-compatible CMOS inputs and 3-state outputs

Manufacturer: Texas Instruments

Catalog

20-ch, 2.3-V to 3.6-V buffers with bus-hold, TTL-compatible CMOS inputs and 3-state outputs

Key Features

State-of-the-Art Advanced BiCMOS Technology (ABT)WidebusTMDesign for 2.5-V and 3.3-V Operation and Low Static Power DissipationSupport Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V VCC)Typical VOLP(Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA= 25°CPower Off Disables Outputs, Permitting Live InsertionHigh-Impedance State During Power Up and Power Down Prevents Driver ConflictUses Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From FloatingOutput Ports Have Equivalent 30-Series Resistors, So No External Resistors Are RequiredAuto3-State Eliminates Bus Current Loading When Output Exceeds VCC+ 0.5 VLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model; and Exceeds 1000 V Using Charged-Device Model, Robotic MethodFlow-Through Architecture Facilitates Printed Circuit Board LayoutDistributed VCCand GND Pin Configuration Minimizes High-Speed Switching NoisePackage Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) PackageWidebus is a trademark of Texas Instruments Incorporated.State-of-the-Art Advanced BiCMOS Technology (ABT)WidebusTMDesign for 2.5-V and 3.3-V Operation and Low Static Power DissipationSupport Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V VCC)Typical VOLP(Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA= 25°CPower Off Disables Outputs, Permitting Live InsertionHigh-Impedance State During Power Up and Power Down Prevents Driver ConflictUses Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From FloatingOutput Ports Have Equivalent 30-Series Resistors, So No External Resistors Are RequiredAuto3-State Eliminates Bus Current Loading When Output Exceeds VCC+ 0.5 VLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model; and Exceeds 1000 V Using Charged-Device Model, Robotic MethodFlow-Through Architecture Facilitates Printed Circuit Board LayoutDistributed VCCand GND Pin Configuration Minimizes High-Speed Switching NoisePackage Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) PackageWidebus is a trademark of Texas Instruments Incorporated.

Description

AI
The 'ALVTH162827 devices are 20-bit buffers/line drivers designed for 2.5-V or 3.3-V VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. The devices are composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1\ and 1OE2\, or 2OE1\ and 2OE2\) inputs must be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state. When VCCis between 0 and 1.2 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. All outputs are designed to sink up to 12 mA, and include equivalent 30-resistors to reduce overshoot and undershoot. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN54ALVTH162827 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALVTH162827 is characterized for operation from -40°C to 85°C. The 'ALVTH162827 devices are 20-bit buffers/line drivers designed for 2.5-V or 3.3-V VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. The devices are composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1\ and 1OE2\, or 2OE1\ and 2OE2\) inputs must be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state. When VCCis between 0 and 1.2 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.2 V, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. All outputs are designed to sink up to 12 mA, and include equivalent 30-resistors to reduce overshoot and undershoot. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN54ALVTH162827 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALVTH162827 is characterized for operation from -40°C to 85°C.