SN65LVDS116 Series

1:16 LVDS clock fanout buffer

Catalog

1:16 LVDS clock fanout buffer

Part	Delay Time	Operating Temperature [Max]	Operating Temperature [Min]	Output	Data Rate (Max)	Input	Number of Channels	Supplier Device Package	Voltage - Supply [Max]	Voltage - Supply [Min]	Capacitance - Input	Mounting Type	Package / Case [x]	Package / Case	Package / Case	Current - Supply	Type
Texas Instruments SN65LVDS116DGGR	3.1 ns	85 °C	-40 °C	LVDS	400 Mbps	LVDS	1 x 1:16	64-TSSOP	3.6 V	3 V	5 pF	Surface Mount	0.24 in	6.1 mm	64-TFSOP	84 mA	Buffer Multiplexer
Texas Instruments SN65LVDS116DGG	3.1 ns	85 °C	-40 °C	LVDS	400 Mbps	LVDS	1 x 1:16	64-TSSOP	3.6 V	3 V	5 pF	Surface Mount	0.24 in	6.1 mm	64-TFSOP	84 mA	Buffer Multiplexer

Catalog

1:16 LVDS clock fanout buffer

Key Features

• One Receiver and Sixteen Line Drivers Meet or Exceed the Requirements of ANSI EIA/TIA-644 StandardTypical Data Signaling Rates to 400 Mbps or Clock Frequencies to 400 MHzEnabling Logic Allows Separate Control of Each Bank of Four Channels or 2-Bit Selection of Any One of the Four BanksLow-Voltage Differential Signaling With Typical Output Voltage of 350 mV and a 100-One Receiver and Sixteen Line Drivers Meet or Exceed the Requirements of ANSI EIA/TIA-644 StandardTypical Data Signaling Rates to 400 Mbps or Clock Frequencies to 400 MHzEnabling Logic Allows Separate Control of Each Bank of Four Channels or 2-Bit Selection of Any One of the Four BanksLow-Voltage Differential Signaling With Typical Output Voltage of 350 mV and a 100-