LMK04102 Series

Jitter cleaner with integrated 1600 to 1750-MHz VCO:3 outputs for 2VPEC/LVPEC+4 outputs for LVCOMS

Catalog

Jitter cleaner with integrated 1600 to 1750-MHz VCO:3 outputs for 2VPEC/LVPEC+4 outputs for LVCOMS

Part	Output	Frequency - Max [Max]	Voltage - Supply [Max]	Voltage - Supply [Min]	Number of Circuits	Input	Package / Case	Mounting Type	Operating Temperature [Max]	Operating Temperature [Min]	Ratio - Input:Output [custom]	Ratio - Input:Output [custom]	Supplier Device Package	Divider/Multiplier
Texas Instruments LMK04102SQX/NOPB	2VPECL LVCMOS LVPECL	1.08 GHz	3.45 V	3.15 V	1	LVCMOS LVDS LVPECL	48-WFQFN Exposed Pad	Surface Mount	85 °C	-40 °C	7	2	48-WQFN (7x7)	Yes/No
Texas Instruments LMK04102SQE/NOPB	2VPECL LVCMOS LVPECL	1.08 GHz	3.45 V	3.15 V	1	LVCMOS LVDS LVPECL	48-WFQFN Exposed Pad	Surface Mount	85 °C	-40 °C	7	2	48-WQFN (7x7)	Yes/No
Texas Instruments LMK04102SQ/NOPB	2VPECL LVCMOS LVPECL	1.08 GHz	3.45 V	3.15 V	1	LVCMOS LVDS LVPECL	48-WFQFN Exposed Pad	Surface Mount	85 °C	-40 °C	7	2	48-WQFN (7x7)	Yes/No

Catalog

Jitter cleaner with integrated 1600 to 1750-MHz VCO:3 outputs for 2VPEC/LVPEC+4 outputs for LVCOMS

Key Features

• Cascaded PLLatinum PLL ArchitecturePLL1Redundant Reference Inputs Loss of SignalDetectionAutomatic and Manual Selection ofReference Clock InputPLL2Phase Detector Rate up to 100 MHzInputFrequency-DoublerIntegrated VCOOutputsLVPECL/2VPECL, LVDS, andLVCMOS FormatsSupport Clock Rates up to 1080 MHzFive Dedicated Channel Divider BlocksCommon Output Frequencies Supported:30.72 MHz, 61.44 MHz, 62.5 MHz,74.25 MHz, 75 MHz, 77.76 MHz, 100 MHz,106.25 MHz, 125 MHz, 122.88 MHz,150 MHz, 155.52 MHz, 156.25 MHz, 159.375 MHz,187.5 MHz, 200 MHz,212.5 MHz, 245.76 MHz, 250 MHz, 311.04 MHz,312.5 MHz, 368.64 MHz,491.52 MHz, 622.08 MHz, 625 MHz, 983.04 MHzMICROWIRE (SPI) Programming InterfaceIndustrial Temperature Range: –40 to 85 °C3.15 V to 3.45 V OperationPackage: 48 Pin WQFN (7.0 × 7.0 × 0.8 mm)Cascaded PLLatinum PLL ArchitecturePLL1Redundant Reference Inputs Loss of SignalDetectionAutomatic and Manual Selection ofReference Clock InputPLL2Phase Detector Rate up to 100 MHzInputFrequency-DoublerIntegrated VCOOutputsLVPECL/2VPECL, LVDS, andLVCMOS FormatsSupport Clock Rates up to 1080 MHzFive Dedicated Channel Divider BlocksCommon Output Frequencies Supported:30.72 MHz, 61.44 MHz, 62.5 MHz,74.25 MHz, 75 MHz, 77.76 MHz, 100 MHz,106.25 MHz, 125 MHz, 122.88 MHz,150 MHz, 155.52 MHz, 156.25 MHz, 159.375 MHz,187.5 MHz, 200 MHz,212.5 MHz, 245.76 MHz, 250 MHz, 311.04 MHz,312.5 MHz, 368.64 MHz,491.52 MHz, 622.08 MHz, 625 MHz, 983.04 MHzMICROWIRE (SPI) Programming InterfaceIndustrial Temperature Range: –40 to 85 °C3.15 V to 3.45 V OperationPackage: 48 Pin WQFN (7.0 × 7.0 × 0.8 mm)

Description

The LMK04100 family of precision clock conditioners provides jitter cleaning, clock multiplication and distribution without the need for high-performance VCXO modules. When connected to a recovered system reference clock and a VCXO, the device generates 5 low jitter clocks in LVCMOS, LVDS, or LVPECL formats. The LMK04100 family of precision clock conditioners provides jitter cleaning, clock multiplication and distribution without the need for high-performance VCXO modules. When connected to a recovered system reference clock and a VCXO, the device generates 5 low jitter clocks in LVCMOS, LVDS, or LVPECL formats.