Catalog
18-bit TTL/BTL universal storage transceiver
Key Features
• Compatible With IEEE Std 1194.1-1991 (BTL)TTL A Port, Backplane Transceiver Logic (BTL) B\ PortOpen-Collector B\-Port Outputs Sink 100 mABIAS VCCMinimizes Signal Distortion During Live Insertion or WithdrawalHigh-Impedance State During Power Up and Power DownB\-Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level VoltageTTL-Input Structures Incorporate Active Clamping to Aid in Line TerminationCompatible With IEEE Std 1194.1-1991 (BTL)TTL A Port, Backplane Transceiver Logic (BTL) B\ PortOpen-Collector B\-Port Outputs Sink 100 mABIAS VCCMinimizes Signal Distortion During Live Insertion or WithdrawalHigh-Impedance State During Power Up and Power DownB\-Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level VoltageTTL-Input Structures Incorporate Active Clamping to Aid in Line Termination
Description
AI
The SN74FB1650 contains two 9-bit transceivers designed to translate signals between TTL and backplane transceiver-logic (BTL) environments. The device is designed specifically to be compatible with IEEE Std 1194.1-1991.
The B\ port operates at BTL-signal levels. The open-collector B\ ports are specified to sink 100 mA. Two output enables (OEB and OEB\) are provided for the B\ outputs. When OEB is low, OEB\ is high, or VCCis less than 2.1 V, the B\ port is turned off.
The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B\ port when the A-port output enable (OEA) is high. When OEA is low or when VCCis less than 2.1 V, the A outputs are in the high-impedance state.
BIAS VCCestablishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCCis not connected.
BG VCCand BG GND are the supply inputs for the bias generator.
The SN74FB1650 contains two 9-bit transceivers designed to translate signals between TTL and backplane transceiver-logic (BTL) environments. The device is designed specifically to be compatible with IEEE Std 1194.1-1991.
The B\ port operates at BTL-signal levels. The open-collector B\ ports are specified to sink 100 mA. Two output enables (OEB and OEB\) are provided for the B\ outputs. When OEB is low, OEB\ is high, or VCCis less than 2.1 V, the B\ port is turned off.
The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B\ port when the A-port output enable (OEA) is high. When OEA is low or when VCCis less than 2.1 V, the A outputs are in the high-impedance state.
BIAS VCCestablishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCCis not connected.
BG VCCand BG GND are the supply inputs for the bias generator.