LMK1D1208I Series
8-channel output, 1.8-V, 2.5-V, and 3.3-V LVDS buffer with I²C
Manufacturer: Texas Instruments
Catalog
8-channel output, 1.8-V, 2.5-V, and 3.3-V LVDS buffer with I²C
Key Features
• High-performance LVDS clock buffer family with 2 inputs and 8 outputsOutput frequency up to 2 GHzSupply voltage: 1.8 V / 2.5 V / 3.3 V ± 5%Device configurability through I 2C programmingIndividual input and output enable/disableIndividual output amplitude select (standard or boosted)Bank input multiplexerFour programmable I 2C addresses through IDX pinsLow additive jitter: < 60 fs RMS maximum in 12-kHz to 20-MHz at 156.25 MHzVery low phase noise floor: -164 dBc/Hz (typical)Very low propagation delay: < 575 ps maximumOutput skew: 20 ps maximumUniversal inputs accept LVDS, LVPECL, LVCMOS, HCSL and CMLFail-safe inputsLVDS reference voltage, V AC_REF, available for capacitive coupled inputsIndustrial temperature range: –40°C to 105°CPackages available6-mm × 6-mm, 40-Pin VQFN (RHA)High-performance LVDS clock buffer family with 2 inputs and 8 outputsOutput frequency up to 2 GHzSupply voltage: 1.8 V / 2.5 V / 3.3 V ± 5%Device configurability through I 2C programmingIndividual input and output enable/disableIndividual output amplitude select (standard or boosted)Bank input multiplexerFour programmable I 2C addresses through IDX pinsLow additive jitter: < 60 fs RMS maximum in 12-kHz to 20-MHz at 156.25 MHzVery low phase noise floor: -164 dBc/Hz (typical)Very low propagation delay: < 575 ps maximumOutput skew: 20 ps maximumUniversal inputs accept LVDS, LVPECL, LVCMOS, HCSL and CMLFail-safe inputsLVDS reference voltage, V AC_REF, available for capacitive coupled inputsIndustrial temperature range: –40°C to 105°CPackages available6-mm × 6-mm, 40-Pin VQFN (RHA)
Description
AI
The LMK1D1208I is an I 2C-programmable LVDS clock buffer. The device has two inputs and eight pairs of differential LVDS clock outputs (OUT0 through OUT7) with minimum skew for clock distribution. The inputs can either be LVDS, LVPECL, LVCMOS, HCSL, or CML.
The LMK1D1208I is specifically designed for driving 50-Ω transmission lines. When driving inputs in single-ended mode, apply the appropriate bias voltage to the unused negative input pin.
I 2C programming enables this device to be configured as a single bank buffer (one of the two inputs is distributed to eight output pairs) or as a dual bank buffer (each input is distributed to four outputs pairs). Each output can be configured to have either a standard (350 mV) or boosted (500 mV) swing. This device also incorporates individual output channel enable or disable through I 2C programming. The LMK1D1208I has fail-safe inputs that prevent oscillation at the outputs in the absence of an input signal and allows for input signals before VDD is supplied.
The device operates in a 1.8-V, 2.5-V, or 3.3-V supply environment and is characterized from –40°C to 105°C (ambient temperature).
The LMK1D1208I is an I 2C-programmable LVDS clock buffer. The device has two inputs and eight pairs of differential LVDS clock outputs (OUT0 through OUT7) with minimum skew for clock distribution. The inputs can either be LVDS, LVPECL, LVCMOS, HCSL, or CML.
The LMK1D1208I is specifically designed for driving 50-Ω transmission lines. When driving inputs in single-ended mode, apply the appropriate bias voltage to the unused negative input pin.
I 2C programming enables this device to be configured as a single bank buffer (one of the two inputs is distributed to eight output pairs) or as a dual bank buffer (each input is distributed to four outputs pairs). Each output can be configured to have either a standard (350 mV) or boosted (500 mV) swing. This device also incorporates individual output channel enable or disable through I 2C programming. The LMK1D1208I has fail-safe inputs that prevent oscillation at the outputs in the absence of an input signal and allows for input signals before VDD is supplied.
The device operates in a 1.8-V, 2.5-V, or 3.3-V supply environment and is characterized from –40°C to 105°C (ambient temperature).
