SN74ABT5402A Series

12-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Catalog

12-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Part	Number of Bits per Element	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Mounting Type	Supplier Device Package	Package / Case	Package / Case [x]	Package / Case [y]	Operating Temperature [Max]	Operating Temperature [Min]	Output Type	Logic Type	Number of Elements	Voltage - Supply [Min]	Voltage - Supply [Max]
Texas Instruments SN74ABT5402DW
Texas Instruments SN74ABT5402ADW	12	12 mA	12 mA	Surface Mount	28-SOIC	28-SOIC	0.295 in	7.5 mm	85 °C	-40 °C	3-State	Buffer Non-Inverting	1	4.5 V	5.5 V

Catalog

12-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Key Features

• Output Ports Have Equivalent 25- Series Resistors, So No External Resistors Are RequiredState-of-the-ArtEPIC-IIBTMBiCMOS Design Significantly Reduces Power DissipationLatch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17Typical VOLP(Output Ground Bounce) < 1 V at VCC= 5 V, TA= 25°CTypical VOLV(Output Undershoot) < 0.5 V at VCC= 5 V, TA= 25°CPackage Options Include Plastic Small-Outline (DW) Package and Ceramic Chip Carriers (FK) and DIPs (JT)EPIC-IIB is a trademark of Texas Instruments Incorporated.Output Ports Have Equivalent 25- Series Resistors, So No External Resistors Are RequiredState-of-the-ArtEPIC-IIBTMBiCMOS Design Significantly Reduces Power DissipationLatch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17Typical VOLP(Output Ground Bounce) < 1 V at VCC= 5 V, TA= 25°CTypical VOLV(Output Undershoot) < 0.5 V at VCC= 5 V, TA= 25°CPackage Options Include Plastic Small-Outline (DW) Package and Ceramic Chip Carriers (FK) and DIPs (JT)EPIC-IIB is a trademark of Texas Instruments Incorporated.

Description

These 12-bit buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all 12 outputs are in the high-impedance state. The outputs, which are designed to source or sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT5402A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT5402A is characterized for operation from -40°C to 85°C. These 12-bit buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all 12 outputs are in the high-impedance state. The outputs, which are designed to source or sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT5402A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT5402A is characterized for operation from -40°C to 85°C.