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SN74LV8T165

SN74LV8T165 Series

1.65-V to 5.5-V 8-bit parallel-load shift register with voltage translation

Manufacturer: Texas Instruments

Catalog

1.65-V to 5.5-V 8-bit parallel-load shift register with voltage translation

Key Features

Wide operating range of 1.8 V to 5.5 VSingle-supply voltage translator (refer to ):Up translation:1.2 V to 1.8 V1.5 V to 2.5 V1.8 V to 3.3 V3.3 V to 5.0 VDown translation:5.0 V, 3.3 V, 2.5 V to 1.8 V5.0 V, 3.3 V to 2.5 V5.0 V to 3.3 V5.5 V tolerant input pinsSupports standard pinoutsUp to 150Mbps with 5 V or 3.3 V V CCLatching logic with known power-up stateLatch-up performance exceeds 250 mA per JESD 17Wide operating range of 1.8 V to 5.5 VSingle-supply voltage translator (refer to ):Up translation:1.2 V to 1.8 V1.5 V to 2.5 V1.8 V to 3.3 V3.3 V to 5.0 VDown translation:5.0 V, 3.3 V, 2.5 V to 1.8 V5.0 V, 3.3 V to 2.5 V5.0 V to 3.3 V5.5 V tolerant input pinsSupports standard pinoutsUp to 150Mbps with 5 V or 3.3 V V CCLatching logic with known power-up stateLatch-up performance exceeds 250 mA per JESD 17

Description

AI
The SN74LV8T165 device is a parallel- or serial-in, serial-out 8-bit shift register. This device has two modes of operation: load data, and shift data which are controlled by the SH/ LD input. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels. The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example 3.3 V to 2.5 V output). The SN74LV8T165 device is a parallel- or serial-in, serial-out 8-bit shift register. This device has two modes of operation: load data, and shift data which are controlled by the SH/ LD input. The output level is referenced to the supply voltage (V CC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels. The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example 3.3 V to 2.5 V output).