MC10LVEP11 Series

Clock / Data Fanout Buffer, 1:2 Differential, ECL, 2.5 V / 3.3 V

Catalog

Clock / Data Fanout Buffer, 1:2 Differential, ECL, 2.5 V / 3.3 V

Part	Output	Input	Voltage - Supply [Max]	Voltage - Supply [Min]	Frequency - Max [Max]	Differential - Input:Output [custom]	Differential - Input:Output [custom]	Number of Circuits	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Ratio - Input:Output [custom]	Type	Mounting Type	Package / Case	Package / Case [custom]	Package / Case	Package / Case [y]	Package / Case [x]
ON Semiconductor MC10LVEP11DTG	ECL PECL	CML LVDS PECL	3.8 V	2.375 V	3 GHz			1	8-TSSOP	85 °C	-40 °C	1:2	Fanout Buffer (Distribution)	Surface Mount	8-MSOP 8-TSSOP	0.118 in	3 mm
ON Semiconductor MC10LVEP11DR2G	ECL PECL	CML LVDS PECL	3.8 V	2.375 V	3 GHz			1	8-SOIC	85 °C	-40 °C	1:2	Fanout Buffer (Distribution)	Surface Mount	8-SOIC			3.9 mm	0.154 in

Catalog

Clock / Data Fanout Buffer, 1:2 Differential, ECL, 2.5 V / 3.3 V

Key Features

• 240 ps Typical Propagation Delay

• Maximum Frequency > 3 GHz Typical

• PECL Mode Operating Range: VCC= 2.375 V to 3.8 V with VEE= 0 V

• NECL Mode Operating Range: VCC= 0 V with VEE= -2.375 V to -3.8 V

• Open Input Default State

• Q Outputs will default LOW with inputs open or at VEE

• LVDS Input Compatible

Description

The MC10LVEP11 is a differential 1:2 fanout buffer. The device is pin and functionally equivalent to the EP11 device. With AC performance the same as the EP11 device, the LVEP11 is ideal for applications requiring lower voltage. Single ended CLK input operation is limited to a VCC>= 3.0 V in PECL mode, or VEE<= -3.0 V in NECL mode.The 100 Series contains temperature compensation.