DRV8701 Series

47-V H-bridge smart gate driver

Catalog

47-V H-bridge smart gate driver

Part	Voltage - Supply [Max]	Voltage - Supply [Min]	Supplier Device Package	Package / Case	Technology	Applications	Interface	Mounting Type	Operating Temperature [Min]	Operating Temperature [Max]	Voltage - Load [Min]	Voltage - Load [Max]	Function	Output Configuration	Motor Type - AC, DC	Supplied Contents	Utilized IC / Part	Embedded	Primary Attributes	Secondary Attributes	Type
Texas Instruments DRV8701PRGER	5.5 V	0 V	24-VQFN (4x4)	24-VFQFN Exposed Pad	Power MOSFET	General Purpose	PWM	Surface Mount	-40 °C	125 °C	5.9 V	45 V	Controller - Current Management	Pre-Driver - Half Bridge (2)	Brushed DC
Texas Instruments DRV8701ERGET	5.5 V	0 V	24-VQFN (4x4)	24-VFQFN Exposed Pad	Power MOSFET	General Purpose	Parallel	Surface Mount	-40 °C	125 °C	5.9 V	45 V	Controller - Current Management	Pre-Driver - Half Bridge (2)	Brushed DC
Texas Instruments DRV8701EVM													Motor Controller/Driver			Board(s)	DRV8701	16-Bit MCU	Single-H-Bridge Driver	Graphical User Interface (GUI) USB Interface(s)	Power Management
Texas Instruments DRV8701PRGET	5.5 V	0 V	24-VQFN (4x4)	24-VFQFN Exposed Pad	Power MOSFET	General Purpose	PWM	Surface Mount	-40 °C	125 °C	5.9 V	45 V	Controller - Current Management	Pre-Driver - Half Bridge (2)	Brushed DC

Catalog

47-V H-bridge smart gate driver

Key Features

• Single H-Bridge Gate DriverDrives Four External N-Channel MOSFETsSupports 100% PWM Duty Cycle5.9-V to 45-V Operating Supply Voltage RangeTwo Control Interface OptionsPH/EN (DRV8701E)PWM (DRV8701P)Adjustable Gate Drive (5 Levels)6-mA to 150-mA Source Current12.5-mA to 300-mA Sink CurrentSupports 1.8-V, 3.3-V, and 5-V Logic InputsCurrent Shunt Amplifier (20 V/V)Integrated PWM Current RegulationLimits Motor Inrush CurrentLow-Power Sleep Mode (9 µA)Two LDO Voltage Regulators to Power ExternalComponentsAVDD: 4.8 V, up to 30-mA Output LoadDVDD: 3.3 V, up to 30-mA Output LoadSmall Package and Footprint24-Pin VQFN (PowerPAD™)4.0 × 4.0 × 0.9 mmProtection Features:VM Undervoltage Lockout (UVLO)Charge Pump Undervoltage (CPUV)Overcurrent Protection (OCP)Pre-Driver Fault (PDF)Thermal Shutdown (TSD)Fault Condition Output (nFAULT)Single H-Bridge Gate DriverDrives Four External N-Channel MOSFETsSupports 100% PWM Duty Cycle5.9-V to 45-V Operating Supply Voltage RangeTwo Control Interface OptionsPH/EN (DRV8701E)PWM (DRV8701P)Adjustable Gate Drive (5 Levels)6-mA to 150-mA Source Current12.5-mA to 300-mA Sink CurrentSupports 1.8-V, 3.3-V, and 5-V Logic InputsCurrent Shunt Amplifier (20 V/V)Integrated PWM Current RegulationLimits Motor Inrush CurrentLow-Power Sleep Mode (9 µA)Two LDO Voltage Regulators to Power ExternalComponentsAVDD: 4.8 V, up to 30-mA Output LoadDVDD: 3.3 V, up to 30-mA Output LoadSmall Package and Footprint24-Pin VQFN (PowerPAD™)4.0 × 4.0 × 0.9 mmProtection Features:VM Undervoltage Lockout (UVLO)Charge Pump Undervoltage (CPUV)Overcurrent Protection (OCP)Pre-Driver Fault (PDF)Thermal Shutdown (TSD)Fault Condition Output (nFAULT)

Description

The DRV8701 is a single H-bridge gate driver that uses four external N-channel MOSFETs targeted to drive a 12-V to 24-V bidirectional brushed DC motor. A PH/EN (DRV8701E) or PWM (DRV8701P) interface allows simple interfacing to controller circuits. An internal sense amplifier allows for adjustable current control. The gate driver includes circuitry to regulate the winding current using fixed off-time PWM current chopping. DRV8701 drives both high- and low-side FETs with 9.5-V VGSgate drive. The gate drive current for all external FETs is configurable with a single external resistor on the IDRIVE pin. A low-power sleep mode is provided which shuts down internal circuitry to achieve very-low quiescent current draw. This sleep mode can be set by taking the nSLEEP pin low. Internal protection functions are provided: undervoltage lockout, charge pump faults, overcurrent shutdown, short-circuit protection, predriver faults, and overtemperature. Fault conditions are indicated on the nFAULT pin. The DRV8701 is a single H-bridge gate driver that uses four external N-channel MOSFETs targeted to drive a 12-V to 24-V bidirectional brushed DC motor. A PH/EN (DRV8701E) or PWM (DRV8701P) interface allows simple interfacing to controller circuits. An internal sense amplifier allows for adjustable current control. The gate driver includes circuitry to regulate the winding current using fixed off-time PWM current chopping. DRV8701 drives both high- and low-side FETs with 9.5-V VGSgate drive. The gate drive current for all external FETs is configurable with a single external resistor on the IDRIVE pin. A low-power sleep mode is provided which shuts down internal circuitry to achieve very-low quiescent current draw. This sleep mode can be set by taking the nSLEEP pin low. Internal protection functions are provided: undervoltage lockout, charge pump faults, overcurrent shutdown, short-circuit protection, predriver faults, and overtemperature. Fault conditions are indicated on the nFAULT pin.