SN74ALS841 Series

10-Bit Bus-Interface D-Type Latches With 3-State Outputs

Catalog

10-Bit Bus-Interface D-Type Latches With 3-State Outputs

Part	Logic Type	Output Type	Mounting Type	Independent Circuits	Operating Temperature [Max]	Operating Temperature [Min]	Delay Time - Propagation	Package / Case [custom]	Package / Case	Package / Case [custom]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Supplier Device Package	Circuit	Voltage - Supply [Min]	Voltage - Supply [Max]
Texas Instruments SN74ALS841FN
Texas Instruments SN74ALS841DW	D-Type Transparent Latch	Tri-State	Surface Mount	1	70 °C	0 °C	7 ns	7.5 mm	24-SOIC	0.295 in	24 mA	2.6 mA	24-SOIC	10:10	4.5 V	5.5 V
Texas Instruments SN74ALS841DWRG4	D-Type Transparent Latch	Tri-State	Surface Mount	1	70 °C	0 °C	7 ns	7.5 mm	24-SOIC	0.295 in	24 mA	2.6 mA	24-SOIC	10:10	4.5 V	5.5 V
Texas Instruments SN74ALS841DWR	D-Type Transparent Latch	Tri-State	Surface Mount	1	70 °C	0 °C	7 ns	7.5 mm	24-SOIC	0.295 in	24 mA	2.6 mA	24-SOIC	10:10	4.5 V	5.5 V

Catalog

10-Bit Bus-Interface D-Type Latches With 3-State Outputs

Key Features

• 3-State Buffer-Type Outputs Drive Bus Lines DirectlyBus-Structured PinoutProvide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With ParityBuffered Control Inputs to Reduce dc Loading EffectsPower-Up High-Impedance StatePackage Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs3-State Buffer-Type Outputs Drive Bus Lines DirectlyBus-Structured PinoutProvide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With ParityBuffered Control Inputs to Reduce dc Loading EffectsPower-Up High-Impedance StatePackage Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs

Description

These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The ten latches are transparent D-type latches. The SN74ALS841 and SN74AS841A have noninverting data (D) inputs. The SN74ALS842 has inverting D\ inputs. A buffered output-enable () input places the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. does not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are off. The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for operation from 0°C to 70°C. These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The ten latches are transparent D-type latches. The SN74ALS841 and SN74AS841A have noninverting data (D) inputs. The SN74ALS842 has inverting D\ inputs. A buffered output-enable () input places the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. does not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are off. The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for operation from 0°C to 70°C.